2014-06-29 01:10:11 -04:00
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <stdint.h>
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#include <malloc.h>
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#include <libdragon.h>
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#include <n64sys.h>
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#include "everdrive.h"
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#include "sys.h"
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#include "types.h"
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#include "utils.h"
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#include "sram.h"
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#define STBI_HEADER_FILE_ONLY
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#include "stb_image.c"
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extern short int gCheats; /* 0 = off, 1 = select, 2 = all */
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extern short int force_tv;
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extern short int boot_country;
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struct gscEntry {
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char *description;
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char *gscodes;
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u16 count;
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u16 state;
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u16 mask;
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u16 value;
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};
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typedef struct gscEntry gscEntry_t;
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extern gscEntry_t gGSCodes[];
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static u8 __attribute__((aligned(16))) dmaBuf[128*1024];
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static volatile struct _PI_regs_s * const _PI_regs = (struct _PI_regs_s *)0xa4600000;
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2014-06-30 03:49:02 -04:00
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int is_valid_rom(unsigned char *buffer) {
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2014-06-29 01:10:11 -04:00
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/* Test if rom is a native .z64 image with header 0x80371240. [ABCD] */
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if((buffer[0]==0x80)&&(buffer[1]==0x37)&&(buffer[2]==0x12)&&(buffer[3]==0x40))
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return 0;
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/* Test if rom is a byteswapped .v64 image with header 0x37804012. [BADC] */
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else if((buffer[0]==0x37)&&(buffer[1]==0x80)&&(buffer[2]==0x40)&&(buffer[3]==0x12))
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return 1;
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/* Test if rom is a wordswapped .n64 image with header 0x40123780. [DCBA] */
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else if((buffer[0]==0x40)&&(buffer[1]==0x12)&&(buffer[2]==0x37)&&(buffer[3]==0x80))
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return 2;
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else
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return 0;
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}
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2014-06-30 03:49:02 -04:00
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void swap_header(unsigned char* header, int loadlength) {
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2014-06-29 01:10:11 -04:00
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unsigned char temp;
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int i;
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/* Btyeswap if .v64 image. */
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2014-06-30 03:49:02 -04:00
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if( header[0]==0x37) {
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for (i = 0; i < loadlength; i+=2) {
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2014-06-29 01:10:11 -04:00
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temp= header[i];
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2014-06-30 03:49:02 -04:00
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header[i]= header[i+1];
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header[i+1]=temp;
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2014-06-29 01:10:11 -04:00
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}
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}
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/* Wordswap if .n64 image. */
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2014-06-30 03:49:02 -04:00
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else if( header[0]==0x40) {
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for (i = 0; i < loadlength; i+=4) {
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2014-06-29 01:10:11 -04:00
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temp= header[i];
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2014-06-30 03:49:02 -04:00
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header[i]= header[i+3];
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header[i+3]=temp;
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2014-06-29 01:10:11 -04:00
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temp= header[i+1];
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2014-06-30 03:49:02 -04:00
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header[i+1]= header[i+2];
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header[i+2]=temp;
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2014-06-29 01:10:11 -04:00
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}
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2014-06-30 03:49:02 -04:00
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}
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2014-06-29 01:10:11 -04:00
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}
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u8 getCicType(u8 bios_cic) {
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u8 cic_buff[2048];
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volatile u8 cic_chip;
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2014-06-30 03:49:02 -04:00
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volatile u32 val;
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2014-06-29 01:10:11 -04:00
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if (bios_cic) {
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evd_setCfgBit(ED_CFG_SDRAM_ON, 0);
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sleep(10);
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val = *(u32 *) 0xB0000170;
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dma_read_s(cic_buff, 0xB0000040, 1024);
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cic_chip = get_cic(cic_buff);
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evd_setCfgBit(ED_CFG_SDRAM_ON, 1);
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sleep(10);
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2014-06-30 03:49:02 -04:00
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}
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else {
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2014-06-29 01:10:11 -04:00
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val = *(u32 *) 0xB0000170;
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dma_read_s(cic_buff, 0xB0000040, 1024);
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cic_chip = get_cic(cic_buff);
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}
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2014-06-30 03:49:02 -04:00
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2014-06-29 01:10:11 -04:00
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return cic_chip;
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}
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2014-06-30 03:49:02 -04:00
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int get_cic(unsigned char *buffer) {
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2014-06-29 01:10:11 -04:00
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unsigned int crc;
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// figure out the CIC
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crc = CRC_Calculate(0, buffer, 1000);
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2014-06-30 03:49:02 -04:00
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switch(crc) {
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case 0x303faac9:
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case 0xf0da3d50:
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return 1;
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case 0xf3106101:
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return 2;
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case 0xe7cd9d51:
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return 3;
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case 0x7ae65c9:
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return 5;
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case 0x86015f8f:
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return 6;
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2014-06-29 01:10:11 -04:00
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}
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2014-06-30 03:49:02 -04:00
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2014-06-29 01:10:11 -04:00
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return 2;
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}
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2014-06-30 03:49:02 -04:00
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int get_cic_save(char *cartid, int *cic, int *save) {
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2014-06-29 01:10:11 -04:00
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// variables
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int NUM_CARTS = 137;
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int i;
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//data arrays
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2014-06-30 03:49:02 -04:00
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/*
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char *names[] = {
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"gnuboy64lite", "FRAMTestRom", "SRAMTestRom", "Worms Armageddon",
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"Super Smash Bros.", "Banjo-Tooie", "Blast Corps", "Bomberman Hero",
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"Body Harvest", "Banjo-Kazooie", "Bomberman 64",
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"Bomberman 64: Second Attack", "Command & Conquer", "Chopper Attack",
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"NBA Courtside 2 featuring Kobe Bryant", "Penny Racers",
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"Chameleon Twist", "Cruis'n USA", "Cruis'n World",
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"Legend of Zelda: Majora's Mask, The", "Donkey Kong 64",
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"Donkey Kong 64", "Donald Duck: Goin' Quackers",
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"Loony Toons: Duck Dodgers", "Diddy Kong Racing", "PGA European Tour",
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"Star Wars Episode 1 Racer", "AeroFighters Assault", "Bass Hunter 64",
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"Conker's Bad Fur Day", "F-1 World Grand Prix", "Star Fox 64",
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"F-Zero X", "GT64 Championship Edition", "GoldenEye 007", "Glover",
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"Bomberman 64", "Indy Racing 2000",
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"Indiana Jones and the Infernal Machine", "Jet Force Gemini",
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"Jet Force Gemini", "Earthworm Jim 3D", "Snowboard Kids 2",
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"Kirby 64: The Crystal Shards", "Fighters Destiny",
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"Major League Baseball featuring Ken Griffey Jr.",
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"Killer Instinct Gold", "Ken Griffey Jr's Slugfest", "Mario Kart 64",
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"Mario Party", "Lode Runner 3D", "Megaman 64", "Mario Tennis",
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"Mario Golf", "Mission: Impossible", "Mickey's Speedway USA",
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"Monopoly", "Paper Mario", "Multi-Racing Championship",
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"Big Mountain 2000", "Mario Party 3", "Mario Party 2", "Excitebike 64",
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"Dr. Mario 64", "Star Wars Episode 1: Battle for Naboo",
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"Kobe Bryant in NBA Courtside", "Excitebike 64",
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"Ogre Battle 64: Person of Lordly Caliber", "Pokémon Stadium 2",
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"Pokémon Stadium 2", "Perfect Dark", "Pokémon Snap",
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"Hey you, Pikachu!", "Pokémon Snap", "Pokémon Puzzle League",
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"Pokémon Stadium", "Pokémon Stadium", "Pilotwings 64",
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"Top Gear Overdrive", "Resident Evil 2", "New Tetris, The",
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"Star Wars: Rogue Squadron", "Ridge Racer 64",
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"Star Soldier: Vanishing Earth", "AeroFighters Assault",
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"Starshot Space Circus", "Super Mario 64", "Starcraft 64",
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"Rocket: Robot on Wheels", "Space Station Silicon Valley",
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"Star Wars: Shadows of the Empire", "Tigger's Honey Hunt",
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"1080º Snowboarding", "Tom & Jerry in Fists of Furry",
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"Mischief Makers", "All-Star Tennis '99", "Tetrisphere",
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"V-Rally Edition '99", "V-Rally Edition '99", "WCW/NWO Revenge",
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"WWF: No Mercy", "Waialae Country Club: True Golf Classics",
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"Wave Race 64", "Worms Armageddon", "WWF: Wrestlemania 2000",
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"Cruis'n Exotica", "Yoshi's Story", "Harvest Moon 64",
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"Legend of Zelda: Ocarina of Time, The",
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"Legend of Zelda: Majora's Mask, The", "Airboarder 64",
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"Bakuretsu Muteki Bangaioh", "Choro-Q 64 II", "Custom Robo",
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"Custom Robo V2", "Densha de Go! 64", "Doraemon: Mittsu no Seireiseki",
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"Dezaemon 3D", "Transformers Beast Wars",
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"Transformers Beast Wars Metals", "64 Trump Collection", "Bass Rush",
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"ECW Hardcore Revolution", "40 Winks", "Aero Gauge",
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"Aidyn Chronicles The First Mage", "Derby Stallion 64",
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"Doraemon 2 - Hikari no Shinden", "Doraemon 3 - Nobi Dai No Machi SOS",
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"F-1 World Grand Prix II", "Fushigi no Dungeon - Furai no Shiren 2",
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"Heiwa Pachinko World 64", "Neon Genesis Evangelion",
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"Racing Simulation", "Tsumi to Batsu", "Sonic Wings Assault",
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"Virtual Pro Wrestling", "Virtual Pro Wrestling 2", "Wild Choppers"
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};
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*/
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char *cartIDs[] = {
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"DZ", "B6", "ZY", "ZZ", "AD", "AL", "B7", "BC", "BD", "BH", "BK", "BM",
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"BV", "CC", "CH", "CK", "CR", "CT", "CU", "CW", "DL", "DO", "DP", "DQ",
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"DU", "DY", "EA", "EP", "ER", "FH", "FU", "FW", "FX", "FZ", "GC", "GE",
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"GV", "HA", "IC", "IJ", "JD", "JF", "JM", "K2", "K4", "KA", "KG", "KI",
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"KJ", "KT", "LB", "LR", "M6", "M8", "MF", "MI", "ML", "MO", "MQ", "MR",
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"MU", "MV", "MW", "MX", "N6", "NA", "NB", "NX", "OB", "P2", "P3", "PD",
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"PF", "PG", "PH", "PN", "PO", "PS", "PW", "RC", "RE", "RI", "RS", "RZ",
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"S6", "SA", "SC", "SM", "SQ", "SU", "SV", "SW", "T9", "TE", "TJ", "TM",
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"TN", "TP", "VL", "VY", "W2", "W4", "WL", "WR", "WU", "WX", "XO", "YS",
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"YW", "ZL", "ZS", "AB", "BN", "CG", "CX", "CZ", "D6", "DR", "DZ", "OH",
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"TB", "TC", "VB", "WI", "4W", "AG", "AY", "DA", "D2", "3D", "F2", "SI",
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"HP", "EV", "MG", "GU", "SA", "VP", "A2", "WC"
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};
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/*
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int saveTypes[] = {
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5, 1, 6, 5, 5, 5, 5, 5, 5, 4, 5, 4, 5, 5, 5, 6, 4, 6, 6, 5, 5, 5, 5, 6,
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5, 5, 6, 5, 5, 1, 5, 5, 5, 5, 5, 5, 4, 4, 5, 5, 5, 5, 1, 5, 4, 5, 5, 5,
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4, 6, 1, 5, 5, 5, 4, 5, 5, 6, 5, 6, 5, 5, 6, 6, 1, 4, 4, 6, 4, 5, 4, 4,
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4, 4, 5, 5, 1, 1, 5, 6, 5, 5, 5, 5, 4, 5, 5, 5, 4, 1, 5, 5, 5, 5, 5, 5,
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1, 4, 5, 5, 5, 1, 5, 6, 1, 1, 4, 5, 5, 5, 5, 6, 1, 5, 1, 5, 5, 5, 1, 1,
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5, 5, 1, 1, 6, 6, 6, 4, 5, 6, 5, 5, 5, 1, 1, 5
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};
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*/
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// Banjo-Tooie B7 -> set to sram 'cause crk converts ek16->sram
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int saveTypes[] = {
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2, 1, 5, 1, 3, 1, 1, 3, 3, 3, 3, 3, 3, 5, 3, 5, 3, 3, 3, 4, 5, 4, 4, 3,
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3, 3, 3, 4, 3, 3, 4, 3, 3, 1, 3, 3, 3, 3, 3, 3, 5, 5, 3, 3, 3, 3, 1, 3,
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5, 3, 3, 3, 5, 4, 1, 3, 3, 3, 5, 3, 3, 4, 3, 4, 3, 3, 4, 4, 1, 5, 5, 4,
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5, 3, 5, 5, 5, 5, 3, 3, 1, 1, 3, 4, 3, 3, 3, 3, 5, 3, 3, 3, 5, 1, 3, 3,
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3, 3, 3, 3, 1, 5, 3, 3, 3, 1, 3, 4, 1, 1, 5, 3, 3, 3, 3, 4, 1, 3, 1, 3,
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3, 3, 1, 1, 3, 3, 1, 1, 4, 4, 4, 5, 3, 4, 3, 3, 3, 1, 1, 3
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};
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//bt cic to 2 pos6 was 5
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int cicTypes[] = {
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2, 2, 2, 2, 2, 3, 2, 2, 2, 2, 3, 2, 2, 2, 2, 2, 2, 2, 2, 6, 5, 5, 5, 2,
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2, 3, 2, 2, 2, 2, 5, 2, 1, 6, 2, 2, 2, 2, 2, 2, 5, 5, 2, 2, 3, 2, 3, 2,
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3, 2, 2, 2, 2, 2, 2, 2, 5, 2, 3, 2, 2, 2, 2, 3, 2, 2, 3, 3, 2, 3, 3, 5,
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3, 2, 3, 2, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 3, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 6, 2, 5, 5, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
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};
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2014-06-29 01:10:11 -04:00
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// search for cartid
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for (i=0; i<NUM_CARTS; i++)
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if (strcmp(cartid, cartIDs[i]) == 0)
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break;
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2014-06-30 03:49:02 -04:00
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if (i == NUM_CARTS) {
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2014-06-29 01:10:11 -04:00
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// cart not in list
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*cic = 2;
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*save = 0;
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return 0; // not found
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}
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// cart found
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*cic = cicTypes[i];
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*save = saveTypes[i];
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2014-06-30 03:49:02 -04:00
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2014-06-29 01:10:11 -04:00
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return 1; // found
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}
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2014-06-30 03:49:02 -04:00
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const char* saveTypeToExtension(int type, int etype) {
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static char* str = "SAV";
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if(etype==0){
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switch(type) {
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case 0: str = "OFF"; break;
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case 1: str = "SRM"; break;
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case 2: str = "128"; break;
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case 3: str = "E4K"; break;
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case 4: str = "E16"; break;
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case 5: str = "FLA"; break;
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default: str = "SAV";
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}
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}
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else {
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switch(type) {
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case 0: str = "OFF"; break;
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case 1: str = "SRA"; break;
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case 2: str = "SRA"; break;
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case 3: str = "EEP"; break;
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case 4: str = "EEP"; break;
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case 5: str = "FLA"; break;
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default: str = "SAV";
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}
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}
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return str;
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2014-06-29 01:10:11 -04:00
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}
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|
2014-06-30 03:49:02 -04:00
|
|
|
int saveTypeToSize(int type) {
|
|
|
|
switch(type) {
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0: return 0; break;
|
|
|
|
case 1: return SAVE_SIZE_SRAM; break;
|
|
|
|
case 2: return SAVE_SIZE_SRAM128; break;
|
|
|
|
case 3: return SAVE_SIZE_EEP4k; break;
|
|
|
|
case 4: return SAVE_SIZE_EEP16k; break;
|
|
|
|
case 5: return SAVE_SIZE_FLASH; break;
|
|
|
|
default: return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
#define SAVE_TYPE_OFF 0
|
|
|
|
#define SAVE_TYPE_SRAM 1
|
|
|
|
#define SAVE_TYPE_SRAM128 2
|
|
|
|
#define SAVE_TYPE_EEP4k 3
|
|
|
|
#define SAVE_TYPE_EEP16k 4
|
|
|
|
#define SAVE_TYPE_FLASH 5
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
|
|
//switch to the correct dump function
|
2014-06-30 03:49:02 -04:00
|
|
|
int getSaveFromCart(int stype, uint8_t *buffer) {
|
|
|
|
int ret=0;
|
|
|
|
|
|
|
|
switch(stype) {
|
|
|
|
case 0: return 0;
|
2014-06-29 01:10:11 -04:00
|
|
|
case 1: ret = getSRAM32(buffer); break;
|
|
|
|
case 2: ret = getSRAM128(buffer); break;
|
|
|
|
case 3: ret = getEeprom4k(buffer); break;
|
|
|
|
case 4: ret = getEeprom16k(buffer); break;
|
|
|
|
case 5: ret = getFlashRAM(buffer); break;
|
|
|
|
default: return 0;
|
|
|
|
}
|
2014-06-30 03:49:02 -04:00
|
|
|
|
|
|
|
return ret;
|
2014-06-29 01:10:11 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
//switch to the correct upload function
|
|
|
|
int pushSaveToCart(int stype, uint8_t *buffer){
|
2014-06-30 03:49:02 -04:00
|
|
|
int ret=0;
|
|
|
|
|
|
|
|
switch(stype) {
|
|
|
|
case 0: return 0;
|
2014-06-29 01:10:11 -04:00
|
|
|
case 1: ret = setSRAM32(buffer); break;
|
|
|
|
case 2: ret = setSRAM128(buffer); break;
|
|
|
|
case 3: ret = setEeprom4k(buffer); break;
|
|
|
|
case 4: ret = setEeprom16k(buffer); break;
|
|
|
|
case 5: ret = setFlashRAM(buffer); break;
|
|
|
|
default: return 0;
|
|
|
|
}
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
return ret;
|
2014-06-29 01:10:11 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
int getSRAM( uint8_t *buffer, int size){
|
|
|
|
while (dma_busy()) ;
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
IO_WRITE(PI_BSD_DOM2_LAT_REG, 0x05);
|
2014-06-29 01:10:11 -04:00
|
|
|
IO_WRITE(PI_BSD_DOM2_PWD_REG, 0x0C);
|
|
|
|
IO_WRITE(PI_BSD_DOM2_PGS_REG, 0x0D);
|
|
|
|
IO_WRITE(PI_BSD_DOM2_RLS_REG, 0x02);
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
while (dma_busy()) ;
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
PI_Init();
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
sleep(1000);
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
while (dma_busy()) ;
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
PI_DMAFromSRAM(buffer, 0, size) ;
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
while (dma_busy()) ;
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
IO_WRITE(PI_BSD_DOM2_LAT_REG, 0x40);
|
|
|
|
IO_WRITE(PI_BSD_DOM2_PWD_REG, 0x12);
|
|
|
|
IO_WRITE(PI_BSD_DOM2_PGS_REG, 0x07);
|
|
|
|
IO_WRITE(PI_BSD_DOM2_RLS_REG, 0x03);
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
return 1;
|
|
|
|
}
|
2014-06-29 01:10:11 -04:00
|
|
|
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
int getSRAM32( uint8_t *buffer) {
|
|
|
|
return getSRAM(buffer, SAVE_SIZE_SRAM);
|
|
|
|
}
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
int getSRAM128( uint8_t *buffer) {
|
|
|
|
return getSRAM(buffer, SAVE_SIZE_SRAM128);
|
|
|
|
}
|
2014-06-29 01:10:11 -04:00
|
|
|
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
//working hurray :D
|
|
|
|
int getEeprom4k( uint8_t *buffer) {
|
|
|
|
if(eeprom_present()){
|
|
|
|
int blocks=SAVE_SIZE_EEP4k/8;
|
|
|
|
for( int b = 0; b < blocks; b++ ) {
|
|
|
|
eeprom_read( b, &buffer[b * 8] );
|
|
|
|
}
|
|
|
|
return 1;
|
|
|
|
}
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
return 0;
|
|
|
|
}
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
int getEeprom16k( uint8_t *buffer){
|
|
|
|
int blocks=SAVE_SIZE_EEP16k/8;
|
|
|
|
for( int b = 0; b < blocks; b++ ) {
|
|
|
|
eeprom_read( b, &buffer[b * 8] );
|
|
|
|
}
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
return 1;
|
|
|
|
}
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
int getFlashRAM( uint8_t *buffer){
|
|
|
|
evd_setSaveType(SAVE_TYPE_SRAM128); //2
|
|
|
|
sleep(10);
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
int s = getSRAM(buffer, SAVE_SIZE_SRAM128);
|
|
|
|
data_cache_hit_writeback_invalidate(buffer,SAVE_SIZE_SRAM128);
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
sleep(10);
|
|
|
|
evd_setSaveType(SAVE_TYPE_FLASH); //5
|
|
|
|
|
|
|
|
return 1;
|
2014-06-29 01:10:11 -04:00
|
|
|
}
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
|
|
|
|
/*
|
|
|
|
sram upload
|
2014-06-30 03:49:02 -04:00
|
|
|
*/
|
|
|
|
int setSRAM( uint8_t *buffer,int size){
|
|
|
|
//half working
|
|
|
|
PI_DMAWait();
|
|
|
|
//Timing
|
|
|
|
PI_Init_SRAM();
|
|
|
|
|
|
|
|
//Readmode
|
|
|
|
PI_Init();
|
|
|
|
|
|
|
|
data_cache_hit_writeback_invalidate(buffer,size);
|
|
|
|
while (dma_busy());
|
|
|
|
PI_DMAToSRAM(buffer, 0, size);
|
|
|
|
data_cache_hit_writeback_invalidate(buffer,size);
|
|
|
|
|
|
|
|
//Wait
|
|
|
|
PI_DMAWait();
|
|
|
|
//Restore evd Timing
|
|
|
|
setSDTiming();
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
int setSRAM32( uint8_t *buffer){
|
|
|
|
return setSRAM(buffer, SAVE_SIZE_SRAM);
|
|
|
|
}
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
int setSRAM128( uint8_t *buffer){
|
|
|
|
return setSRAM(buffer, SAVE_SIZE_SRAM128);
|
|
|
|
}
|
2014-06-29 01:10:11 -04:00
|
|
|
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
//working hurray :D
|
|
|
|
int setEeprom4k( uint8_t *buffer){
|
|
|
|
if(eeprom_present()){
|
|
|
|
int blocks=SAVE_SIZE_EEP4k/8;
|
|
|
|
for( int b = 0; b < blocks; b++ ) {
|
|
|
|
eeprom_write( b, &buffer[b * 8] );
|
|
|
|
}
|
|
|
|
return 1;
|
|
|
|
}
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
return 0;
|
|
|
|
}
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
int setEeprom16k(uint8_t *buffer){
|
|
|
|
int blocks=SAVE_SIZE_EEP16k/8;
|
|
|
|
for( int b = 0; b < blocks; b++ ) {
|
|
|
|
eeprom_write( b, &buffer[b * 8] );
|
|
|
|
}
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
return 1;
|
|
|
|
}
|
2014-06-29 01:10:11 -04:00
|
|
|
|
|
|
|
|
|
|
|
//isn't working nor finished
|
2014-06-30 03:49:02 -04:00
|
|
|
int setFlashRAM(uint8_t *buffer){
|
|
|
|
evd_setSaveType(SAVE_TYPE_SRAM128); //2
|
|
|
|
sleep(10);
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
int s = setSRAM(buffer, SAVE_SIZE_SRAM128);
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
evd_setSaveType(SAVE_TYPE_FLASH); //5
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
return 1;
|
2014-06-29 01:10:11 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
void setSDTiming(void){
|
|
|
|
/*
|
|
|
|
PI_BSD_DOM1_LAT_REG (0x04600014) write word 0x000000FF
|
|
|
|
PI_BSD_DOM1_PWD_REG (0x04600018) write word 0x000000FF
|
|
|
|
PI_BSD_DOM1_PGS_REG (0x0460001C) write word 0x0000000F
|
|
|
|
PI_BSD_DOM1_RLS_REG (0x04600020) write word 0x00000003
|
2014-06-30 03:49:02 -04:00
|
|
|
*
|
2014-06-29 01:10:11 -04:00
|
|
|
PI_BSD_DOM1_LAT_REG (0x04600014) write word 0x00000040
|
|
|
|
PI_BSD_DOM1_PWD_REG (0x04600018) write word 0x00803712
|
|
|
|
PI_BSD_DOM1_PGS_REG (0x0460001C) write word 0x00008037
|
|
|
|
PI_BSD_DOM1_RLS_REG (0x04600020) write word 0x00000803
|
|
|
|
*/
|
2014-06-30 03:49:02 -04:00
|
|
|
// PI_DMAWait();
|
|
|
|
IO_WRITE(PI_BSD_DOM1_LAT_REG, 0x40);
|
2014-06-29 01:10:11 -04:00
|
|
|
IO_WRITE(PI_BSD_DOM1_PWD_REG, 0x12);
|
|
|
|
IO_WRITE(PI_BSD_DOM1_PGS_REG, 0x07);
|
|
|
|
IO_WRITE(PI_BSD_DOM1_RLS_REG, 0x03);
|
|
|
|
|
|
|
|
IO_WRITE(PI_BSD_DOM2_LAT_REG, 0x40);
|
|
|
|
IO_WRITE(PI_BSD_DOM2_PWD_REG, 0x12);
|
|
|
|
IO_WRITE(PI_BSD_DOM2_PGS_REG, 0x07);
|
|
|
|
IO_WRITE(PI_BSD_DOM2_RLS_REG, 0x03);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void _data_cache_invalidate_all(void) {
|
2014-06-30 03:49:02 -04:00
|
|
|
asm(
|
|
|
|
"li $8,0x80000000\n"
|
|
|
|
"li $9,0x80000000\n"
|
|
|
|
"addu $9,$9,0x1FF0\n"
|
|
|
|
"cacheloop:\n"
|
|
|
|
"cache 1,0($8)\n"
|
|
|
|
"cache 1,16($8)\n"
|
|
|
|
"cache 1,32($8)\n"
|
|
|
|
"cache 1,48($8)\n"
|
|
|
|
"cache 1,64($8)\n"
|
|
|
|
"cache 1,80($8)\n"
|
|
|
|
"cache 1,96($8)\n"
|
|
|
|
"addu $8,$8,112\n"
|
|
|
|
"bne $8,$9,cacheloop\n"
|
|
|
|
"cache 1,0($8)\n"
|
2014-06-29 01:10:11 -04:00
|
|
|
: // no outputs
|
|
|
|
: // no inputs
|
|
|
|
: "$8", "$9" // trashed registers
|
2014-06-30 03:49:02 -04:00
|
|
|
);
|
2014-06-29 01:10:11 -04:00
|
|
|
}
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
void restoreTiming(void) {
|
|
|
|
//n64 timing restore :>
|
|
|
|
IO_WRITE(PI_BSD_DOM1_LAT_REG, 0x40);
|
2014-06-29 01:10:11 -04:00
|
|
|
IO_WRITE(PI_BSD_DOM1_PWD_REG, 0x12);
|
|
|
|
IO_WRITE(PI_BSD_DOM1_PGS_REG, 0x07);
|
|
|
|
IO_WRITE(PI_BSD_DOM1_RLS_REG, 0x03);
|
|
|
|
|
|
|
|
IO_WRITE(PI_BSD_DOM2_LAT_REG, 0x40);
|
|
|
|
IO_WRITE(PI_BSD_DOM2_PWD_REG, 0x12);
|
|
|
|
IO_WRITE(PI_BSD_DOM2_PGS_REG, 0x07);
|
|
|
|
IO_WRITE(PI_BSD_DOM2_RLS_REG, 0x03);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Load an image from the rom filesystem, returning a pointer to the
|
|
|
|
* sprite that hold the image.
|
|
|
|
*/
|
2014-06-30 03:49:02 -04:00
|
|
|
sprite_t *loadImageDFS(char *fname) {
|
2014-06-29 01:10:11 -04:00
|
|
|
int size, x, y, n, fd;
|
|
|
|
u8 *tbuf;
|
|
|
|
u8 *ibuf;
|
|
|
|
sprite_t *sbuf;
|
|
|
|
|
|
|
|
fd = dfs_open(fname);
|
|
|
|
if (fd < 0)
|
|
|
|
return 0; // couldn't open image
|
|
|
|
|
|
|
|
size = dfs_size(fd);
|
|
|
|
tbuf = malloc(size);
|
2014-06-30 03:49:02 -04:00
|
|
|
if (!tbuf) {
|
2014-06-29 01:10:11 -04:00
|
|
|
dfs_close(fd);
|
|
|
|
return 0; // out of memory
|
|
|
|
}
|
|
|
|
|
|
|
|
dfs_read(tbuf, 1, size, fd);
|
|
|
|
dfs_close(fd);
|
|
|
|
|
|
|
|
ibuf = stbi_load_from_memory(tbuf, size, &x, &y, &n, 4);
|
|
|
|
free(tbuf);
|
|
|
|
if (!ibuf)
|
|
|
|
return 0; // couldn't decode image
|
|
|
|
|
|
|
|
sbuf = (sprite_t*)malloc(sizeof(sprite_t) + x * y * 2);
|
2014-06-30 03:49:02 -04:00
|
|
|
if (!sbuf) {
|
2014-06-29 01:10:11 -04:00
|
|
|
stbi_image_free(ibuf);
|
|
|
|
return 0; // out of memory
|
|
|
|
}
|
|
|
|
sbuf->width = x;
|
|
|
|
sbuf->height = y;
|
|
|
|
sbuf->bitdepth = 2;
|
|
|
|
sbuf->format = 0;
|
|
|
|
sbuf->hslices = x / 32;
|
|
|
|
sbuf->vslices = y / 16;
|
|
|
|
|
|
|
|
color_t *src = (color_t*)ibuf;
|
|
|
|
u16 *dst = (u16*)((u32)sbuf + sizeof(sprite_t));
|
|
|
|
|
|
|
|
for (int j=0; j<y; j++)
|
|
|
|
for (int i=0; i<x; i++)
|
|
|
|
dst[i + j*x] = graphics_convert_color(src[i + j*x]) & 0x0000FFFF;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
/* Invalidate data associated with sprite in cache */
|
|
|
|
data_cache_hit_writeback_invalidate( sbuf->data, sbuf->width * sbuf->height * sbuf->bitdepth );
|
|
|
|
|
|
|
|
stbi_image_free(ibuf);
|
|
|
|
return sbuf;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
sprite_t *loadImage32(u8 *png, int size) {
|
2014-06-29 01:10:11 -04:00
|
|
|
int x, y, n, fd;
|
|
|
|
u8 *tbuf;
|
|
|
|
u32 *ibuf;
|
|
|
|
sprite_t *sbuf;
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
tbuf = malloc(size);
|
|
|
|
memcpy(tbuf,png,size);
|
|
|
|
|
2014-06-30 03:57:17 -04:00
|
|
|
ibuf = (u32*)stbi_load_from_memory(tbuf, size, &x, &y, &n, 4);
|
2014-06-29 01:10:11 -04:00
|
|
|
free(tbuf);
|
|
|
|
if (!ibuf)
|
|
|
|
return 0; // couldn't decode image
|
|
|
|
|
|
|
|
sbuf = (sprite_t*)malloc(sizeof(sprite_t) + x * y * 4);
|
2014-06-30 03:49:02 -04:00
|
|
|
if (!sbuf) {
|
2014-06-29 01:10:11 -04:00
|
|
|
stbi_image_free(ibuf);
|
|
|
|
return 0; // out of memory
|
|
|
|
}
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
sbuf->width = x;
|
|
|
|
sbuf->height = y;
|
|
|
|
sbuf->bitdepth = 4;
|
|
|
|
sbuf->format = 0;
|
|
|
|
sbuf->hslices = x / 32;
|
|
|
|
sbuf->vslices = y / 32;
|
|
|
|
|
|
|
|
// color_t *src = (color_t*)ibuf;
|
|
|
|
u32 *dst = (u32*)((u32)sbuf + sizeof(sprite_t));
|
|
|
|
|
|
|
|
for (int j=0; j<y; j++)
|
|
|
|
for (int i=0; i<x; i++)
|
|
|
|
dst[i + j*x] = ibuf[i + j*x];
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
/* Invalidate data associated with sprite in cache */
|
|
|
|
data_cache_hit_writeback_invalidate( sbuf->data, sbuf->width * sbuf->height * sbuf->bitdepth );
|
|
|
|
|
|
|
|
stbi_image_free(ibuf);
|
|
|
|
return sbuf;
|
|
|
|
}
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
sprite_t *loadImage32DFS(char *fname) {
|
2014-06-29 01:10:11 -04:00
|
|
|
int size, x, y, n, fd;
|
|
|
|
u8 *tbuf;
|
|
|
|
u32 *ibuf;
|
|
|
|
sprite_t *sbuf;
|
|
|
|
|
|
|
|
fd = dfs_open(fname);
|
|
|
|
if (fd < 0)
|
|
|
|
return 0; // couldn't open image
|
|
|
|
|
|
|
|
size = dfs_size(fd);
|
|
|
|
tbuf = malloc(size);
|
2014-06-30 03:49:02 -04:00
|
|
|
if (!tbuf) {
|
2014-06-29 01:10:11 -04:00
|
|
|
dfs_close(fd);
|
|
|
|
return 0; // out of memory
|
|
|
|
}
|
|
|
|
|
|
|
|
dfs_read(tbuf, 1, size, fd);
|
|
|
|
dfs_close(fd);
|
|
|
|
|
2014-06-30 03:57:17 -04:00
|
|
|
ibuf = (u32*)stbi_load_from_memory(tbuf, size, &x, &y, &n, 4);
|
2014-06-29 01:10:11 -04:00
|
|
|
free(tbuf);
|
|
|
|
if (!ibuf)
|
|
|
|
return 0; // couldn't decode image
|
|
|
|
|
|
|
|
sbuf = (sprite_t*)malloc(sizeof(sprite_t) + x * y * 4);
|
2014-06-30 03:49:02 -04:00
|
|
|
if (!sbuf) {
|
2014-06-29 01:10:11 -04:00
|
|
|
stbi_image_free(ibuf);
|
|
|
|
return 0; // out of memory
|
|
|
|
}
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
sbuf->width = x;
|
|
|
|
sbuf->height = y;
|
|
|
|
sbuf->bitdepth = 4;
|
|
|
|
sbuf->format = 0;
|
|
|
|
sbuf->hslices = x / 32;
|
|
|
|
sbuf->vslices = y / 32;
|
|
|
|
|
|
|
|
// color_t *src = (color_t*)ibuf;
|
|
|
|
u32 *dst = (u32*)((u32)sbuf + sizeof(sprite_t));
|
|
|
|
|
|
|
|
for (int j=0; j<y; j++)
|
|
|
|
for (int i=0; i<x; i++)
|
|
|
|
dst[i + j*x] = ibuf[i + j*x];
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
/* Invalidate data associated with sprite in cache */
|
|
|
|
data_cache_hit_writeback_invalidate( sbuf->data, sbuf->width * sbuf->height * sbuf->bitdepth );
|
|
|
|
|
|
|
|
stbi_image_free(ibuf);
|
|
|
|
return sbuf;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Draw an image to the screen using the sprite passed.
|
|
|
|
*/
|
2014-06-30 03:49:02 -04:00
|
|
|
void drawImage(display_context_t dcon, sprite_t *sprite) {
|
2014-06-29 01:10:11 -04:00
|
|
|
int x, y = 0;
|
|
|
|
|
|
|
|
rdp_sync(SYNC_PIPE);
|
|
|
|
rdp_set_default_clipping();
|
|
|
|
rdp_enable_texture_copy();
|
|
|
|
rdp_attach_display(dcon);
|
|
|
|
// Draw image
|
2014-06-30 03:49:02 -04:00
|
|
|
for (int j=0; j<sprite->vslices; j++) {
|
2014-06-29 01:10:11 -04:00
|
|
|
x = 0;
|
2014-06-30 03:49:02 -04:00
|
|
|
for (int i=0; i<sprite->hslices; i++) {
|
2014-06-29 01:10:11 -04:00
|
|
|
rdp_sync(SYNC_PIPE);
|
|
|
|
rdp_load_texture_stride(0, 0, MIRROR_DISABLED, sprite, j*sprite->hslices + i);
|
|
|
|
rdp_draw_sprite(0, x, y);
|
|
|
|
x += 32;
|
|
|
|
}
|
|
|
|
y += 16;
|
|
|
|
}
|
|
|
|
rdp_detach_display();
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
#define CIC_6101 1
|
|
|
|
#define CIC_6102 2
|
|
|
|
#define CIC_6103 3
|
|
|
|
#define CIC_6104 4
|
|
|
|
#define CIC_6105 5
|
|
|
|
#define CIC_6106 6
|
|
|
|
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
void globalTest(void) {
|
|
|
|
gCheats=1;
|
2014-06-29 01:10:11 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
void simulate_boot(u32 cic_chip, u8 gBootCic) {
|
|
|
|
if (cic_chip == CIC_6104)
|
|
|
|
cic_chip = CIC_6102;
|
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
u32 ix, sz, cart, country;
|
|
|
|
vu32 *src, *dst;
|
|
|
|
u32 info = *(vu32 *)0xB000003C;
|
|
|
|
vu64 *gGPR = (vu64 *)0xA03E0000;
|
|
|
|
vu32 *codes = (vu32 *)0xA0000180;
|
2014-06-30 04:01:41 -04:00
|
|
|
u64 bootAddr = 0xFFFFFFFFA4000040LL;
|
2014-06-29 01:10:11 -04:00
|
|
|
char *cp, *vp, *tp;
|
|
|
|
char temp[8];
|
|
|
|
int i, type, val;
|
|
|
|
int curr_cheat = 0;
|
|
|
|
|
|
|
|
cart = info >> 16;
|
|
|
|
country = (info >> 8) & 0xFF;
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
if(boot_country!=0){
|
|
|
|
switch(boot_country){
|
|
|
|
case 1: country = 0x45; break; //ntsc region
|
|
|
|
case 2: country = 0x50; break; //pal region
|
|
|
|
default: break;
|
|
|
|
}
|
|
|
|
}
|
2014-06-29 01:10:11 -04:00
|
|
|
|
|
|
|
// clear XBUS/Flush/Freeze
|
|
|
|
((vu32 *)0xA4100000)[3] = 0x15;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
sz = (gBootCic != CIC_6105) ? *(vu32 *)0xA0000318 : *(vu32 *)0xA00003F0;
|
|
|
|
if (cic_chip == CIC_6105)
|
|
|
|
*(vu32 *)0xA00003F0 = sz;
|
|
|
|
else
|
|
|
|
*(vu32 *)0xA0000318 = sz;
|
|
|
|
|
|
|
|
// clear some OS globals for cleaner boot
|
|
|
|
*(vu32 *)0xA000030C = 0; // cold boot
|
|
|
|
memset((void *)0xA000031C, 0, 64); // clear app nmi buffer
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
if (gCheats) {
|
2014-06-29 01:10:11 -04:00
|
|
|
u16 xv, yv, zv;
|
|
|
|
u32 xx;
|
|
|
|
vu32 *sp, *dp;
|
|
|
|
// get rom os boot segment - note, memcpy won't work for copying rom
|
|
|
|
sp = (vu32 *)0xB0001000;
|
|
|
|
dp = (vu32 *)0xA02A0000;
|
|
|
|
for (ix=0; ix<0x100000; ix++)
|
|
|
|
*dp++ = *sp++;
|
|
|
|
// default boot address with cheats
|
|
|
|
sp = (vu32 *)0xB0000008;
|
2014-06-30 04:01:41 -04:00
|
|
|
bootAddr = 0xFFFFFFFF00000000LL | *sp;
|
2014-06-29 01:10:11 -04:00
|
|
|
|
|
|
|
// move general int handler
|
|
|
|
sp = (vu32 *)0xA0000180;
|
|
|
|
dp = (vu32 *)0xA0000120;
|
|
|
|
for (ix=0; ix<0x60; ix+=4)
|
|
|
|
*dp++ = *sp++;
|
|
|
|
|
|
|
|
// insert new general int handler prologue
|
|
|
|
*codes++ = 0x401a6800; // mfc0 k0,c0_cause
|
|
|
|
*codes++ = 0x241b005c; // li k1,23*4
|
|
|
|
*codes++ = 0x335a007c; // andi k0,k0,0x7c
|
|
|
|
*codes++ = 0x175b0012; // bne k0,k1,0x1d8
|
|
|
|
*codes++ = 0x00000000; // nop
|
|
|
|
*codes++ = 0x40809000; // mtc0 zero,c0_watchlo
|
|
|
|
*codes++ = 0x401b7000; // mfc0 k1,c0_epc
|
|
|
|
*codes++ = 0x8f7a0000; // lw k0,0(k1)
|
|
|
|
*codes++ = 0x3c1b03e0; // lui k1,0x3e0
|
|
|
|
*codes++ = 0x035bd024; // and k0,k0,k1
|
|
|
|
*codes++ = 0x001ad142; // srl k0,k0,0x5
|
|
|
|
*codes++ = 0x3c1ba000; // lui k1,0xa000
|
|
|
|
*codes++ = 0x8f7b01cc; // lw k1,0x01cc(k1)
|
|
|
|
*codes++ = 0x035bd025; // or k0,k0,k1
|
|
|
|
*codes++ = 0x3c1ba000; // lui k1,0xa000
|
|
|
|
*codes++ = 0xaf7a01cc; // sw k0,0x01cc(k1)
|
|
|
|
*codes++ = 0x3c1b8000; // lui k1,0x8000
|
|
|
|
*codes++ = 0xbf7001cc; // cache 0x10,0x01cc(k1)
|
|
|
|
*codes++ = 0x3c1aa000; // lui k0,0xa000
|
|
|
|
*codes++ = 0x37400120; // ori zero,k0,0x120
|
|
|
|
*codes++ = 0x42000018; // eret
|
|
|
|
*codes++ = 0x00000000; // nop
|
|
|
|
|
|
|
|
// process cheats
|
2014-06-30 03:49:02 -04:00
|
|
|
while (gGSCodes[curr_cheat].count != 0xFFFF) {
|
|
|
|
if (!gGSCodes[curr_cheat].state || !gGSCodes[curr_cheat].count) {
|
2014-06-29 01:10:11 -04:00
|
|
|
// cheat not enabled or no codes, skip
|
|
|
|
curr_cheat++;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
for (i=0; i<gGSCodes[curr_cheat].count; i++) {
|
2014-06-29 01:10:11 -04:00
|
|
|
cp = &gGSCodes[curr_cheat].gscodes[i*16 + 0];
|
|
|
|
vp = &gGSCodes[curr_cheat].gscodes[i*16 + 9];
|
|
|
|
|
|
|
|
temp[0] = cp[0];
|
|
|
|
temp[1] = cp[1];
|
|
|
|
temp[2] = 0;
|
|
|
|
type = strtol(temp, (char **)NULL, 16);
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
switch(type) {
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0x80:
|
|
|
|
// write 8-bit value to (cached) ram continuously
|
|
|
|
// 80XXYYYY 00ZZ
|
|
|
|
temp[0] = cp[2];
|
|
|
|
temp[1] = cp[3];
|
|
|
|
temp[2] = 0;
|
|
|
|
xv = strtol(temp, (char **)NULL, 16);
|
|
|
|
temp[0] = cp[4];
|
|
|
|
temp[1] = cp[5];
|
|
|
|
temp[2] = cp[6];
|
|
|
|
temp[3] = cp[7];
|
|
|
|
temp[4] = 0;
|
|
|
|
yv = strtol(temp, (char **)NULL, 16);
|
|
|
|
if (yv & 0x8000) xv++; // adjust for sign extension of yv
|
2014-06-30 03:49:02 -04:00
|
|
|
if (gGSCodes[curr_cheat].mask) {
|
2014-06-29 01:10:11 -04:00
|
|
|
zv = gGSCodes[curr_cheat].value & gGSCodes[curr_cheat].mask;
|
|
|
|
}
|
2014-06-30 03:49:02 -04:00
|
|
|
else {
|
2014-06-29 01:10:11 -04:00
|
|
|
temp[0] = vp[2];
|
|
|
|
temp[1] = vp[3];
|
|
|
|
temp[2] = 0;
|
|
|
|
zv = strtol(temp, (char **)NULL, 16);
|
|
|
|
}
|
|
|
|
*codes++ = 0x3c1a8000 | xv; // lui k0,80xx
|
|
|
|
*codes++ = 0x241b0000 | zv; // li k1,00zz
|
|
|
|
*codes++ = 0xa35b0000 | yv; // sb k1,yyyy(k0)
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0x81:
|
|
|
|
// write 16-bit value to (cached) ram continuously
|
|
|
|
// 81XXYYYY 00ZZ
|
|
|
|
temp[0] = cp[2];
|
|
|
|
temp[1] = cp[3];
|
|
|
|
temp[2] = 0;
|
|
|
|
xv = strtol(temp, (char **)NULL, 16);
|
|
|
|
temp[0] = cp[4];
|
|
|
|
temp[1] = cp[5];
|
|
|
|
temp[2] = cp[6];
|
|
|
|
temp[3] = cp[7];
|
|
|
|
temp[4] = 0;
|
|
|
|
yv = strtol(temp, (char **)NULL, 16);
|
|
|
|
if (yv & 0x8000) xv++; // adjust for sign extension of yv
|
2014-06-30 03:49:02 -04:00
|
|
|
if (gGSCodes[curr_cheat].mask) {
|
2014-06-29 01:10:11 -04:00
|
|
|
zv = gGSCodes[curr_cheat].value & gGSCodes[curr_cheat].mask;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
temp[0] = vp[0];
|
|
|
|
temp[1] = vp[1];
|
|
|
|
temp[2] = vp[2];
|
|
|
|
temp[3] = vp[3];
|
|
|
|
temp[4] = 0;
|
|
|
|
zv = strtol(temp, (char **)NULL, 16);
|
|
|
|
}
|
|
|
|
*codes++ = 0x3c1a8000 | xv; // lui k0,80xx
|
|
|
|
*codes++ = 0x241b0000 | zv; // li k1,zzzz
|
|
|
|
*codes++ = 0xa75b0000 | yv; // sh k1,yyyy(k0)
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0x88:
|
|
|
|
// write 8-bit value to (cached) ram on GS button pressed - unimplemented
|
|
|
|
// 88XXYYYY 00ZZ
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0x89:
|
|
|
|
// write 16-bit value to (cached) ram on GS button pressed - unimplemented
|
|
|
|
// 89XXYYYY ZZZZ
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0xA0:
|
|
|
|
// write 8-bit value to (uncached) ram continuously
|
|
|
|
// A0XXYYYY 00ZZ
|
|
|
|
temp[0] = cp[2];
|
|
|
|
temp[1] = cp[3];
|
|
|
|
temp[2] = 0;
|
|
|
|
xv = strtol(temp, (char **)NULL, 16);
|
|
|
|
temp[0] = cp[4];
|
|
|
|
temp[1] = cp[5];
|
|
|
|
temp[2] = cp[6];
|
|
|
|
temp[3] = cp[7];
|
|
|
|
temp[4] = 0;
|
|
|
|
yv = strtol(temp, (char **)NULL, 16);
|
|
|
|
if (yv & 0x8000) xv++; // adjust for sign extension of yv
|
2014-06-30 03:49:02 -04:00
|
|
|
if (gGSCodes[curr_cheat].mask) {
|
2014-06-29 01:10:11 -04:00
|
|
|
zv = gGSCodes[curr_cheat].value & gGSCodes[curr_cheat].mask;
|
|
|
|
}
|
2014-06-30 03:49:02 -04:00
|
|
|
else {
|
2014-06-29 01:10:11 -04:00
|
|
|
temp[0] = vp[2];
|
|
|
|
temp[1] = vp[3];
|
|
|
|
temp[2] = 0;
|
|
|
|
zv = strtol(temp, (char **)NULL, 16);
|
|
|
|
}
|
|
|
|
*codes++ = 0x3c1aa000 | xv; // lui k0,A0xx
|
|
|
|
*codes++ = 0x241b0000 | zv; // li k1,00zz
|
|
|
|
*codes++ = 0xa35b0000 | yv; // sb k1,yyyy(k0)
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0xA1:
|
|
|
|
// write 16-bit value to (uncached) ram continuously
|
|
|
|
// A1XXYYYY 00ZZ
|
|
|
|
temp[0] = cp[2];
|
|
|
|
temp[1] = cp[3];
|
|
|
|
temp[2] = 0;
|
|
|
|
xv = strtol(temp, (char **)NULL, 16);
|
|
|
|
temp[0] = cp[4];
|
|
|
|
temp[1] = cp[5];
|
|
|
|
temp[2] = cp[6];
|
|
|
|
temp[3] = cp[7];
|
|
|
|
temp[4] = 0;
|
|
|
|
yv = strtol(temp, (char **)NULL, 16);
|
|
|
|
if (yv & 0x8000) xv++; // adjust for sign extension of yv
|
2014-06-30 03:49:02 -04:00
|
|
|
if (gGSCodes[curr_cheat].mask) {
|
2014-06-29 01:10:11 -04:00
|
|
|
zv = gGSCodes[curr_cheat].value & gGSCodes[curr_cheat].mask;
|
|
|
|
}
|
2014-06-30 03:49:02 -04:00
|
|
|
else {
|
2014-06-29 01:10:11 -04:00
|
|
|
temp[0] = vp[0];
|
|
|
|
temp[1] = vp[1];
|
|
|
|
temp[2] = vp[2];
|
|
|
|
temp[3] = vp[3];
|
|
|
|
temp[4] = 0;
|
|
|
|
zv = strtol(temp, (char **)NULL, 16);
|
|
|
|
}
|
|
|
|
*codes++ = 0x3c1aa000 | xv; // lui k0,A0xx
|
|
|
|
*codes++ = 0x241b0000 | zv; // li k1,zzzz
|
|
|
|
*codes++ = 0xa75b0000 | yv; // sh k1,yyyy(k0)
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0xCC:
|
|
|
|
// deactivate expansion ram using 3rd method
|
|
|
|
// CC000000 0000
|
|
|
|
if (cic_chip == CIC_6105)
|
|
|
|
*(vu32 *)0xA00003F0 = 0x00400000;
|
|
|
|
else
|
|
|
|
*(vu32 *)0xA0000318 = 0x00400000;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0xD0:
|
|
|
|
// do next gs code if ram location is equal to 8-bit value
|
|
|
|
// D0XXYYYY 00ZZ
|
|
|
|
temp[0] = cp[2];
|
|
|
|
temp[1] = cp[3];
|
|
|
|
temp[2] = 0;
|
|
|
|
xv = strtol(temp, (char **)NULL, 16);
|
|
|
|
temp[0] = cp[4];
|
|
|
|
temp[1] = cp[5];
|
|
|
|
temp[2] = cp[6];
|
|
|
|
temp[3] = cp[7];
|
|
|
|
temp[4] = 0;
|
|
|
|
yv = strtol(temp, (char **)NULL, 16);
|
|
|
|
if (yv & 0x8000) xv++; // adjust for sign extension of yv
|
|
|
|
temp[0] = vp[2];
|
|
|
|
temp[1] = vp[3];
|
|
|
|
temp[2] = 0;
|
|
|
|
zv = strtol(temp, (char **)NULL, 16);
|
|
|
|
*codes++ = 0x3c1a8000 | xv; // lui k0,0x80xx
|
|
|
|
*codes++ = 0x835a0000 | yv; // lb k0,yyyy(k0)
|
|
|
|
*codes++ = 0x241b0000 | zv; // li k1,00zz
|
|
|
|
*codes++ = 0x175b0004; // bne k0,k1,4
|
|
|
|
*codes++ = 0x00000000; // nop
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0xD1:
|
|
|
|
// do next gs code if ram location is equal to 16-bit value
|
|
|
|
// D1XXYYYY 00ZZ
|
|
|
|
temp[0] = cp[2];
|
|
|
|
temp[1] = cp[3];
|
|
|
|
temp[2] = 0;
|
|
|
|
xv = strtol(temp, (char **)NULL, 16);
|
|
|
|
temp[0] = cp[4];
|
|
|
|
temp[1] = cp[5];
|
|
|
|
temp[2] = cp[6];
|
|
|
|
temp[3] = cp[7];
|
|
|
|
temp[4] = 0;
|
|
|
|
yv = strtol(temp, (char **)NULL, 16);
|
|
|
|
if (yv & 0x8000) xv++; // adjust for sign extension of yv
|
|
|
|
temp[0] = vp[0];
|
|
|
|
temp[1] = vp[1];
|
|
|
|
temp[2] = vp[2];
|
|
|
|
temp[3] = vp[3];
|
|
|
|
temp[4] = 0;
|
|
|
|
zv = strtol(temp, (char **)NULL, 16);
|
|
|
|
*codes++ = 0x3c1a8000 | xv; // lui k0,0x80xx
|
|
|
|
*codes++ = 0x875a0000 | yv; // lh k0,yyyy(k0)
|
|
|
|
*codes++ = 0x241b0000 | zv; // li k1,zzzz
|
|
|
|
*codes++ = 0x175b0004; // bne k0,k1,4
|
|
|
|
*codes++ = 0x00000000; // nop
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0xD2:
|
|
|
|
// do next gs code if ram location is not equal to 8-bit value
|
|
|
|
// D2XXYYYY 00ZZ
|
|
|
|
temp[0] = cp[2];
|
|
|
|
temp[1] = cp[3];
|
|
|
|
temp[2] = 0;
|
|
|
|
xv = strtol(temp, (char **)NULL, 16);
|
|
|
|
temp[0] = cp[4];
|
|
|
|
temp[1] = cp[5];
|
|
|
|
temp[2] = cp[6];
|
|
|
|
temp[3] = cp[7];
|
|
|
|
temp[4] = 0;
|
|
|
|
yv = strtol(temp, (char **)NULL, 16);
|
|
|
|
if (yv & 0x8000) xv++; // adjust for sign extension of yv
|
|
|
|
temp[0] = vp[2];
|
|
|
|
temp[1] = vp[3];
|
|
|
|
temp[2] = 0;
|
|
|
|
zv = strtol(temp, (char **)NULL, 16);
|
|
|
|
*codes++ = 0x3c1a8000 | xv; // lui k0,0x80xx
|
|
|
|
*codes++ = 0x835a0000 | yv; // lb k0,yyyy(k0)
|
|
|
|
*codes++ = 0x241b0000 | zv; // li k1,00zz
|
|
|
|
*codes++ = 0x135b0004; // beq k0,k1,4
|
|
|
|
*codes++ = 0x00000000; // nop
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0xD3:
|
|
|
|
// do next gs code if ram location is not equal to 16-bit value
|
|
|
|
// D3XXYYYY 00ZZ
|
|
|
|
temp[0] = cp[2];
|
|
|
|
temp[1] = cp[3];
|
|
|
|
temp[2] = 0;
|
|
|
|
xv = strtol(temp, (char **)NULL, 16);
|
|
|
|
temp[0] = cp[4];
|
|
|
|
temp[1] = cp[5];
|
|
|
|
temp[2] = cp[6];
|
|
|
|
temp[3] = cp[7];
|
|
|
|
temp[4] = 0;
|
|
|
|
yv = strtol(temp, (char **)NULL, 16);
|
|
|
|
if (yv & 0x8000) xv++; // adjust for sign extension of yv
|
|
|
|
temp[0] = vp[0];
|
|
|
|
temp[1] = vp[1];
|
|
|
|
temp[2] = vp[2];
|
|
|
|
temp[3] = vp[3];
|
|
|
|
temp[4] = 0;
|
|
|
|
zv = strtol(temp, (char **)NULL, 16);
|
|
|
|
*codes++ = 0x3c1a8000 | xv; // lui k0,0x80xx
|
|
|
|
*codes++ = 0x875a0000 | yv; // lh k0,yyyy(k0)
|
|
|
|
*codes++ = 0x241b0000 | zv; // li k1,zzzz
|
|
|
|
*codes++ = 0x135b0004; // beq k0,k1,4
|
|
|
|
*codes++ = 0x00000000; // nop
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0xDD:
|
|
|
|
// deactivate expansion ram using 2nd method
|
|
|
|
// DD000000 0000
|
|
|
|
if (cic_chip == CIC_6105)
|
|
|
|
*(vu32 *)0xA00003F0 = 0x00400000;
|
|
|
|
else
|
|
|
|
*(vu32 *)0xA0000318 = 0x00400000;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0xDE:
|
|
|
|
// set game boot address
|
|
|
|
// DEXXXXXX 0000 => boot address = 800XXXXX, msn ignored
|
|
|
|
temp[0] = cp[2];
|
|
|
|
temp[1] = cp[3];
|
|
|
|
temp[2] = cp[4];
|
|
|
|
temp[3] = cp[5];
|
|
|
|
temp[4] = cp[6];
|
|
|
|
temp[5] = cp[7];
|
|
|
|
temp[6] = 0;
|
|
|
|
val = strtol(temp, (char **)NULL, 16);
|
2014-06-30 04:01:41 -04:00
|
|
|
bootAddr = 0xFFFFFFFF80000000LL | (val & 0xFFFFF);
|
2014-06-29 01:10:11 -04:00
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0xEE:
|
|
|
|
// deactivate expansion ram using 1st method
|
|
|
|
// EE000000 0000
|
|
|
|
if (cic_chip == CIC_6105)
|
|
|
|
*(vu32 *)0xA00003F0 = 0x00400000;
|
|
|
|
else
|
|
|
|
*(vu32 *)0xA0000318 = 0x00400000;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0xF0:
|
|
|
|
// write 8-bit value to ram before boot
|
|
|
|
// F0XXXXXX 00YY
|
|
|
|
temp[0] = cp[2];
|
|
|
|
temp[1] = cp[3];
|
|
|
|
temp[2] = cp[4];
|
|
|
|
temp[3] = cp[5];
|
|
|
|
temp[4] = cp[6];
|
|
|
|
temp[5] = cp[7];
|
|
|
|
temp[6] = 0;
|
|
|
|
val = strtol(temp, (char **)NULL, 16);
|
|
|
|
val -= (bootAddr & 0xFFFFFF);
|
2014-06-30 03:57:17 -04:00
|
|
|
tp = (char *)(0xA02A0000 + val);
|
2014-06-30 03:49:02 -04:00
|
|
|
if (gGSCodes[curr_cheat].mask) {
|
2014-06-29 01:10:11 -04:00
|
|
|
val = gGSCodes[curr_cheat].value & gGSCodes[curr_cheat].mask;
|
|
|
|
}
|
2014-06-30 03:49:02 -04:00
|
|
|
else {
|
2014-06-29 01:10:11 -04:00
|
|
|
temp[0] = vp[2];
|
|
|
|
temp[1] = vp[3];
|
|
|
|
temp[2] = 0;
|
|
|
|
val = strtol(temp, (char **)NULL, 16);
|
|
|
|
}
|
|
|
|
*tp = val & 0x00FF;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0xF1:
|
|
|
|
// write 16-bit value to ram before boot
|
|
|
|
// F1XXXXXX YYYY
|
|
|
|
temp[0] = cp[2];
|
|
|
|
temp[1] = cp[3];
|
|
|
|
temp[2] = cp[4];
|
|
|
|
temp[3] = cp[5];
|
|
|
|
temp[4] = cp[6];
|
|
|
|
temp[5] = cp[7];
|
|
|
|
temp[6] = 0;
|
|
|
|
val = strtol(temp, (char **)NULL, 16);
|
|
|
|
val -= (bootAddr & 0xFFFFFF);
|
2014-06-30 03:57:17 -04:00
|
|
|
tp = (char *)(0xA02A0000 + val);
|
2014-06-30 03:49:02 -04:00
|
|
|
if (gGSCodes[curr_cheat].mask) {
|
2014-06-29 01:10:11 -04:00
|
|
|
val = gGSCodes[curr_cheat].value & gGSCodes[curr_cheat].mask;
|
|
|
|
}
|
2014-06-30 03:49:02 -04:00
|
|
|
else {
|
2014-06-29 01:10:11 -04:00
|
|
|
temp[0] = vp[0];
|
|
|
|
temp[1] = vp[1];
|
|
|
|
temp[2] = vp[2];
|
|
|
|
temp[3] = vp[3];
|
|
|
|
temp[4] = 0;
|
|
|
|
val = strtol(temp, (char **)NULL, 16);
|
|
|
|
}
|
|
|
|
*tp++ = (val >> 8) & 0x00FF;
|
|
|
|
*tp = val & 0x00FF;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0xFF:
|
|
|
|
// set code base
|
|
|
|
// FFXXXXXX 0000
|
|
|
|
temp[0] = cp[2];
|
|
|
|
temp[1] = cp[3];
|
|
|
|
temp[2] = cp[4];
|
|
|
|
temp[3] = cp[5];
|
|
|
|
temp[4] = cp[6];
|
|
|
|
temp[5] = cp[7];
|
|
|
|
temp[6] = 0;
|
|
|
|
val = strtol(temp, (char **)NULL, 16);
|
|
|
|
//codes = (vu32 *)(0xA0000000 | (val & 0xFFFFFF));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
curr_cheat++;
|
|
|
|
}
|
|
|
|
|
|
|
|
// generate jump to moved general int handler
|
|
|
|
*codes++ = 0x3c1a8000; // lui k0,0x8000
|
|
|
|
*codes++ = 0x375a0120; // ori k0,k0,0x120
|
|
|
|
*codes++ = 0x03400008; // jr k0
|
|
|
|
*codes++ = 0x00000000; // nop
|
|
|
|
|
|
|
|
// flush general int handler memory
|
|
|
|
data_cache_hit_writeback_invalidate((void *)0x80000120, 0x2E0);
|
|
|
|
inst_cache_hit_invalidate((void *)0x80000120, 0x2E0);
|
|
|
|
|
|
|
|
// flush os boot segment
|
|
|
|
data_cache_hit_writeback_invalidate((void *)0x802A0000, 0x100000);
|
|
|
|
|
|
|
|
// flush os boot segment memory
|
2014-06-30 04:01:41 -04:00
|
|
|
data_cache_hit_writeback_invalidate((void *)(u32)bootAddr, 0x100000);
|
|
|
|
inst_cache_hit_invalidate((void *)(u32)bootAddr, 0x100000);
|
2014-06-29 01:10:11 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
// Copy low 0x1000 bytes to DMEM
|
|
|
|
//copy bootcode to RSP DMEM starting at 0xA4000040; <- bootaddr
|
|
|
|
src = (vu32 *)0xB0000000; //i think 0xB0000040; is the right value
|
|
|
|
dst = (vu32 *)0xA4000000; //0xA4000040;
|
|
|
|
for (ix=0; ix<(0x1000>>2); ix++)
|
|
|
|
dst[ix] = src[ix];
|
|
|
|
|
|
|
|
|
|
|
|
// Need to copy crap to IMEM for CIC-6105 boot.
|
|
|
|
dst = (vu32 *)0xA4001000;
|
|
|
|
|
|
|
|
// register values due to pif boot for CiC chip and country code, and IMEM crap
|
|
|
|
gGPR[0]=0x0000000000000000LL;
|
|
|
|
gGPR[6]=0xFFFFFFFFA4001F0CLL;
|
|
|
|
gGPR[7]=0xFFFFFFFFA4001F08LL;
|
|
|
|
gGPR[8]=0x00000000000000C0LL;
|
|
|
|
gGPR[9]=0x0000000000000000LL;
|
|
|
|
gGPR[10]=0x0000000000000040LL;
|
|
|
|
gGPR[11]=bootAddr; // 0xFFFFFFFFA4000040LL;
|
|
|
|
gGPR[16]=0x0000000000000000LL;
|
|
|
|
gGPR[17]=0x0000000000000000LL;
|
|
|
|
gGPR[18]=0x0000000000000000LL;
|
|
|
|
gGPR[19]=0x0000000000000000LL;
|
|
|
|
gGPR[21]=0x0000000000000000LL;
|
|
|
|
gGPR[26]=0x0000000000000000LL;
|
|
|
|
gGPR[27]=0x0000000000000000LL;
|
|
|
|
gGPR[28]=0x0000000000000000LL;
|
|
|
|
gGPR[29]=0xFFFFFFFFA4001FF0LL;
|
|
|
|
gGPR[30]=0x0000000000000000LL;
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
switch (country) {
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0x44: //Germany
|
|
|
|
case 0x46: //french
|
|
|
|
case 0x49: //Italian
|
|
|
|
case 0x50: //Europe
|
|
|
|
case 0x53: //Spanish
|
|
|
|
case 0x55: //Australia
|
|
|
|
case 0x58: // ????
|
|
|
|
case 0x59: // X (PAL)
|
2014-06-30 03:49:02 -04:00
|
|
|
if(force_tv!=0)
|
|
|
|
*(u32 *) 0x80000300 = force_tv; //pal
|
|
|
|
else
|
|
|
|
*(u32 *) 0x80000300 = 2;
|
|
|
|
|
|
|
|
switch (cic_chip) {
|
2014-06-29 01:10:11 -04:00
|
|
|
case CIC_6102:
|
|
|
|
gGPR[5]=0xFFFFFFFFC0F1D859LL;
|
|
|
|
gGPR[14]=0x000000002DE108EALL;
|
|
|
|
gGPR[24]=0x0000000000000000LL;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case CIC_6103:
|
|
|
|
gGPR[5]=0xFFFFFFFFD4646273LL;
|
|
|
|
gGPR[14]=0x000000001AF99984LL;
|
|
|
|
gGPR[24]=0x0000000000000000LL;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case CIC_6105:
|
|
|
|
dst[0x04>>2] = 0xBDA807FC;
|
|
|
|
gGPR[5]=0xFFFFFFFFDECAAAD1LL;
|
|
|
|
gGPR[14]=0x000000000CF85C13LL;
|
|
|
|
gGPR[24]=0x0000000000000002LL;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case CIC_6106:
|
|
|
|
gGPR[5]=0xFFFFFFFFB04DC903LL;
|
|
|
|
gGPR[14]=0x000000001AF99984LL;
|
|
|
|
gGPR[24]=0x0000000000000002LL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
gGPR[20]=0x0000000000000000LL;
|
|
|
|
gGPR[23]=0x0000000000000006LL;
|
|
|
|
gGPR[31]=0xFFFFFFFFA4001554LL;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0x37: // 7 (Beta)
|
|
|
|
case 0x41: // ????
|
|
|
|
case 0x45: //USA
|
|
|
|
case 0x4A: //Japan
|
2014-06-30 03:49:02 -04:00
|
|
|
if(force_tv!=0)
|
|
|
|
*(u32 *) 0x80000300 = force_tv; //pal
|
|
|
|
else
|
|
|
|
*(u32 *) 0x80000300 = 1; //ntsc
|
|
|
|
|
|
|
|
// Fall-through
|
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
default:
|
2014-06-30 03:49:02 -04:00
|
|
|
switch (cic_chip) {
|
2014-06-29 01:10:11 -04:00
|
|
|
case CIC_6102:
|
|
|
|
gGPR[5]=0xFFFFFFFFC95973D5LL;
|
|
|
|
gGPR[14]=0x000000002449A366LL;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case CIC_6103:
|
|
|
|
gGPR[5]=0xFFFFFFFF95315A28LL;
|
|
|
|
gGPR[14]=0x000000005BACA1DFLL;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case CIC_6105:
|
|
|
|
dst[0x04>>2] = 0x8DA807FC;
|
|
|
|
gGPR[5]=0x000000005493FB9ALL;
|
|
|
|
gGPR[14]=0xFFFFFFFFC2C20384LL;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case CIC_6106:
|
|
|
|
gGPR[5]=0xFFFFFFFFE067221FLL;
|
|
|
|
gGPR[14]=0x000000005CD2B70FLL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
gGPR[20]=0x0000000000000001LL;
|
|
|
|
gGPR[23]=0x0000000000000000LL;
|
|
|
|
gGPR[24]=0x0000000000000003LL;
|
|
|
|
gGPR[31]=0xFFFFFFFFA4001550LL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
switch (cic_chip) {
|
2014-06-29 01:10:11 -04:00
|
|
|
case CIC_6101:
|
|
|
|
gGPR[22]=0x000000000000003FLL;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case CIC_6102:
|
|
|
|
gGPR[1]=0x0000000000000001LL;
|
|
|
|
gGPR[2]=0x000000000EBDA536LL;
|
|
|
|
gGPR[3]=0x000000000EBDA536LL;
|
|
|
|
gGPR[4]=0x000000000000A536LL;
|
|
|
|
gGPR[12]=0xFFFFFFFFED10D0B3LL;
|
|
|
|
gGPR[13]=0x000000001402A4CCLL;
|
|
|
|
gGPR[15]=0x000000003103E121LL;
|
|
|
|
gGPR[22]=0x000000000000003FLL;
|
|
|
|
gGPR[25]=0xFFFFFFFF9DEBB54FLL;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case CIC_6103:
|
|
|
|
gGPR[1]=0x0000000000000001LL;
|
|
|
|
gGPR[2]=0x0000000049A5EE96LL;
|
|
|
|
gGPR[3]=0x0000000049A5EE96LL;
|
|
|
|
gGPR[4]=0x000000000000EE96LL;
|
|
|
|
gGPR[12]=0xFFFFFFFFCE9DFBF7LL;
|
|
|
|
gGPR[13]=0xFFFFFFFFCE9DFBF7LL;
|
|
|
|
gGPR[15]=0x0000000018B63D28LL;
|
|
|
|
gGPR[22]=0x0000000000000078LL;
|
|
|
|
gGPR[25]=0xFFFFFFFF825B21C9LL;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case CIC_6105:
|
|
|
|
dst[0x00>>2] = 0x3C0DBFC0;
|
|
|
|
dst[0x08>>2] = 0x25AD07C0;
|
|
|
|
dst[0x0C>>2] = 0x31080080;
|
|
|
|
dst[0x10>>2] = 0x5500FFFC;
|
|
|
|
dst[0x14>>2] = 0x3C0DBFC0;
|
|
|
|
dst[0x18>>2] = 0x8DA80024;
|
|
|
|
dst[0x1C>>2] = 0x3C0BB000;
|
|
|
|
gGPR[1]=0x0000000000000000LL;
|
|
|
|
gGPR[2]=0xFFFFFFFFF58B0FBFLL;
|
|
|
|
gGPR[3]=0xFFFFFFFFF58B0FBFLL;
|
|
|
|
gGPR[4]=0x0000000000000FBFLL;
|
|
|
|
gGPR[12]=0xFFFFFFFF9651F81ELL;
|
|
|
|
gGPR[13]=0x000000002D42AAC5LL;
|
|
|
|
gGPR[15]=0x0000000056584D60LL;
|
|
|
|
gGPR[22]=0x0000000000000091LL;
|
|
|
|
gGPR[25]=0xFFFFFFFFCDCE565FLL;
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
case CIC_6106:
|
|
|
|
gGPR[1]=0x0000000000000000LL;
|
|
|
|
gGPR[2]=0xFFFFFFFFA95930A4LL;
|
|
|
|
gGPR[3]=0xFFFFFFFFA95930A4LL;
|
|
|
|
gGPR[4]=0x00000000000030A4LL;
|
|
|
|
gGPR[12]=0xFFFFFFFFBCB59510LL;
|
|
|
|
gGPR[13]=0xFFFFFFFFBCB59510LL;
|
|
|
|
gGPR[15]=0x000000007A3C07F4LL;
|
|
|
|
gGPR[22]=0x0000000000000085LL;
|
|
|
|
gGPR[25]=0x00000000465E3F72LL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
// set HW registers
|
|
|
|
IO_WRITE(PI_STATUS_REG, 0x03);
|
2014-06-30 03:49:02 -04:00
|
|
|
switch (cart) {
|
2014-06-29 01:10:11 -04:00
|
|
|
case 0x4258: // 'BX' - Battle Tanx
|
|
|
|
IO_WRITE(PI_BSD_DOM1_LAT_REG, 0x80);
|
|
|
|
IO_WRITE(PI_BSD_DOM1_RLS_REG, 0x37);
|
|
|
|
IO_WRITE(PI_BSD_DOM1_PWD_REG, 0x12);
|
|
|
|
IO_WRITE(PI_BSD_DOM1_PGS_REG, 0x40);
|
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
|
|
|
case 0x4237: // 'B7' - Banjo Tooie
|
2014-06-29 01:10:11 -04:00
|
|
|
IO_WRITE(PI_BSD_DOM1_LAT_REG, 0x80);
|
|
|
|
IO_WRITE(PI_BSD_DOM1_RLS_REG, 0x37);
|
|
|
|
IO_WRITE(PI_BSD_DOM1_PWD_REG, 0x12);
|
|
|
|
IO_WRITE(PI_BSD_DOM1_PGS_REG, 0x40);
|
2014-06-30 03:49:02 -04:00
|
|
|
break;
|
2014-06-29 01:10:11 -04:00
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
case 0x5A4C: // 'ZL' - Zelda OOT
|
2014-06-29 01:10:11 -04:00
|
|
|
/*
|
2014-06-30 03:49:02 -04:00
|
|
|
IO_WRITE(PI_BSD_DOM2_LAT_REG, 0x00000005);
|
|
|
|
IO_WRITE(PI_BSD_DOM2_PWD_REG, 0x0000000C);
|
|
|
|
IO_WRITE(PI_BSD_DOM2_PGS_REG, 0x0000000D);
|
|
|
|
IO_WRITE(PI_BSD_DOM2_RLS_REG, 0x00000002);
|
2014-06-29 01:10:11 -04:00
|
|
|
*/
|
|
|
|
|
|
|
|
/* unstable
|
|
|
|
IO_WRITE(PI_BSD_DOM1_LAT_REG, 0x00000040);
|
|
|
|
IO_WRITE(PI_BSD_DOM1_RLS_REG, 0x00803712);
|
|
|
|
IO_WRITE(PI_BSD_DOM1_PWD_REG, 0x00008037);
|
2014-06-30 03:49:02 -04:00
|
|
|
IO_WRITE(PI_BSD_DOM1_PGS_REG, 0x00000803);
|
|
|
|
*/
|
2014-06-29 01:10:11 -04:00
|
|
|
break;
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
load immediate:
|
|
|
|
|
|
|
|
li register_destination, value
|
|
|
|
#load immediate value into destination register
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
---
|
2014-06-30 03:49:02 -04:00
|
|
|
|
|
|
|
Registers in coprocessor 0 cannot be used directly by MIPS instructions. Instead, there are two
|
|
|
|
instructions that work much like load and store instructions. The mfc0 (move from coprocessor 0) instruction
|
2014-06-29 01:10:11 -04:00
|
|
|
loads data from a coprocessor 0 register into a CPU register. The mtc0 likewise stores data in a cp0 register.
|
|
|
|
|
|
|
|
Note
|
|
|
|
|
2014-06-30 03:49:02 -04:00
|
|
|
The mtc0 instruction, like the store instruction has the destination last. This is especially important to note,
|
|
|
|
since the syntax for cp0 registers looks the same as the syntax for CPU registers. For example, the following copies
|
2014-06-29 01:10:11 -04:00
|
|
|
the contents of CPU register 13 to cp0 register 12.
|
2014-06-30 03:49:02 -04:00
|
|
|
mtc0 $13, $12
|
|
|
|
|
|
|
|
|
|
|
|
mthi 010001 MoveTo hi = $s
|
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
|
|
|
|
LUI -- Load upper immediate
|
|
|
|
|
|
|
|
Description:
|
|
|
|
The immediate value is shifted left 16 bits and stored in the register. The lower 16 bits are zeroes.
|
|
|
|
Operation:
|
|
|
|
$t = (imm << 16); advance_pc (4);
|
|
|
|
Syntax:
|
|
|
|
lui $t, imm
|
|
|
|
Encoding:
|
|
|
|
0011 11-- ---t tttt iiii iiii iiii iiii
|
|
|
|
|
|
|
|
* */
|
|
|
|
|
|
|
|
// now set MIPS registers - set CP0, and then GPRs, then jump thru gpr11 (which is usually 0xA400040)
|
|
|
|
if (!gCheats)
|
2014-06-30 03:49:02 -04:00
|
|
|
asm(".set noat\n\t"
|
2014-06-29 01:10:11 -04:00
|
|
|
".set noreorder\n\t"
|
|
|
|
"li $8,0x34000000\n\t"
|
|
|
|
"mtc0 $8,$12\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"li $9,0x0006E463\n\t"
|
|
|
|
"mtc0 $9,$16\n\t"
|
|
|
|
"nop\n\t"
|
2014-06-30 03:49:02 -04:00
|
|
|
"nop\n\t"
|
2014-06-29 01:10:11 -04:00
|
|
|
"li $8,0x00005000\n\t"
|
|
|
|
"mtc0 $8,$9\n\t"
|
|
|
|
"nop\n\t"
|
2014-06-30 03:49:02 -04:00
|
|
|
"nop\n\t"
|
2014-06-29 01:10:11 -04:00
|
|
|
"li $9,0x0000005C\n\t"
|
|
|
|
"mtc0 $9,$13\n\t"
|
|
|
|
"nop\n\t"
|
2014-06-30 03:49:02 -04:00
|
|
|
"nop\n\t"
|
2014-06-29 01:10:11 -04:00
|
|
|
"li $8,0x007FFFF0\n\t"
|
|
|
|
"mtc0 $8,$4\n\t"
|
|
|
|
"nop\n\t"
|
2014-06-30 03:49:02 -04:00
|
|
|
"nop\n\t"
|
|
|
|
"nop\n\t"
|
2014-06-29 01:10:11 -04:00
|
|
|
"li $9,0xFFFFFFFF\n\t"
|
|
|
|
"mtc0 $9,$14\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"mtc0 $9,$8\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"mtc0 $9,$30\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"lui $8,0\n\t"
|
|
|
|
"mthi $8\n\t"
|
|
|
|
"nop\n\t"
|
2014-06-30 03:49:02 -04:00
|
|
|
"nop\n\t"
|
2014-06-29 01:10:11 -04:00
|
|
|
"mtlo $8\n\t"
|
|
|
|
"nop\n\t"
|
2014-06-30 03:49:02 -04:00
|
|
|
"nop\n\t"
|
2014-06-29 01:10:11 -04:00
|
|
|
"ctc1 $8,$31\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"lui $31,0xA03E\n\t"
|
|
|
|
//"lui $31,0xA008\n\t"
|
|
|
|
"ld $1,0x08($31)\n\t"
|
|
|
|
"ld $2,0x10($31)\n\t"
|
|
|
|
"ld $3,0x18($31)\n\t"
|
|
|
|
"ld $4,0x20($31)\n\t"
|
|
|
|
"ld $5,0x28($31)\n\t"
|
|
|
|
"ld $6,0x30($31)\n\t"
|
|
|
|
"ld $7,0x38($31)\n\t"
|
|
|
|
"ld $8,0x40($31)\n\t"
|
|
|
|
"ld $9,0x48($31)\n\t"
|
|
|
|
"ld $10,0x50($31)\n\t"
|
|
|
|
"ld $11,0x58($31)\n\t"
|
|
|
|
"ld $12,0x60($31)\n\t"
|
|
|
|
"ld $13,0x68($31)\n\t"
|
|
|
|
"ld $14,0x70($31)\n\t"
|
|
|
|
"ld $15,0x78($31)\n\t"
|
|
|
|
"ld $16,0x80($31)\n\t"
|
|
|
|
"ld $17,0x88($31)\n\t"
|
|
|
|
"ld $18,0x90($31)\n\t"
|
|
|
|
"ld $19,0x98($31)\n\t"
|
|
|
|
"ld $20,0xA0($31)\n\t"
|
|
|
|
"ld $21,0xA8($31)\n\t"
|
|
|
|
"ld $22,0xB0($31)\n\t"
|
|
|
|
"ld $23,0xB8($31)\n\t"
|
|
|
|
"ld $24,0xC0($31)\n\t"
|
|
|
|
"ld $25,0xC8($31)\n\t"
|
|
|
|
"ld $26,0xD0($31)\n\t"
|
|
|
|
"ld $27,0xD8($31)\n\t"
|
|
|
|
"ld $28,0xE0($31)\n\t"
|
|
|
|
"ld $29,0xE8($31)\n\t"
|
|
|
|
"ld $30,0xF0($31)\n\t"
|
|
|
|
"ld $31,0xF8($31)\n\t"
|
|
|
|
"jr $11\n\t"
|
|
|
|
"nop"
|
|
|
|
::: "$8" );
|
2014-06-30 03:49:02 -04:00
|
|
|
|
2014-06-29 01:10:11 -04:00
|
|
|
else
|
|
|
|
asm(".set noreorder\n\t"
|
|
|
|
"li $8,0x34000000\n\t"
|
|
|
|
"mtc0 $8,$12\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"li $9,0x0006E463\n\t"
|
|
|
|
"mtc0 $9,$16\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"li $8,0x00005000\n\t"
|
|
|
|
"mtc0 $8,$9\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"li $9,0x0000005C\n\t"
|
|
|
|
"mtc0 $9,$13\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"li $8,0x007FFFF0\n\t"
|
|
|
|
"mtc0 $8,$4\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"li $9,0xFFFFFFFF\n\t"
|
|
|
|
"mtc0 $9,$14\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"mtc0 $9,$30\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"lui $8,0\n\t"
|
|
|
|
"mthi $8\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"mtlo $8\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"ctc1 $8,$31\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"li $9,0x00000183\n\t"
|
|
|
|
"mtc0 $9,$18\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"mtc0 $zero,$19\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"lui $8,0xA03C\n\t"
|
|
|
|
"la $9,2f\n\t"
|
|
|
|
"la $10,9f\n\t"
|
|
|
|
".set noat\n"
|
|
|
|
"1:\n\t"
|
|
|
|
"lw $2,($9)\n\t"
|
|
|
|
"sw $2,($8)\n\t"
|
|
|
|
"addiu $8,$8,4\n\t"
|
|
|
|
"addiu $9,$9,4\n\t"
|
|
|
|
"bne $9,$10,1b\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"lui $8,0xA03C\n\t"
|
|
|
|
"jr $8\n\t"
|
|
|
|
"nop\n"
|
|
|
|
"2:\n\t"
|
|
|
|
"lui $9,0xB000\n\t"
|
|
|
|
"lw $9,8($9)\n\t"
|
|
|
|
"lui $8,0x2000\n\t"
|
|
|
|
"or $8,$8,$9\n\t"
|
|
|
|
"lui $9,0xA02A\n\t"
|
|
|
|
"lui $10,0xA03A\n\t"
|
|
|
|
"3:\n\t"
|
|
|
|
"lw $2,($9)\n\t"
|
|
|
|
"sw $2,($8)\n\t"
|
|
|
|
"addiu $8,$8,4\n\t"
|
|
|
|
"addiu $9,$9,4\n\t"
|
|
|
|
"bne $9,$10,3b\n\t"
|
|
|
|
"nop\n\t"
|
|
|
|
"lui $31,0xA03E\n\t"
|
|
|
|
"ld $1,0x08($31)\n\t"
|
|
|
|
"ld $2,0x10($31)\n\t"
|
|
|
|
"ld $3,0x18($31)\n\t"
|
|
|
|
"ld $4,0x20($31)\n\t"
|
|
|
|
"ld $5,0x28($31)\n\t"
|
|
|
|
"ld $6,0x30($31)\n\t"
|
|
|
|
"ld $7,0x38($31)\n\t"
|
|
|
|
"ld $8,0x40($31)\n\t"
|
|
|
|
"ld $9,0x48($31)\n\t"
|
|
|
|
"ld $10,0x50($31)\n\t"
|
|
|
|
"ld $11,0x58($31)\n\t"
|
|
|
|
"ld $12,0x60($31)\n\t"
|
|
|
|
"ld $13,0x68($31)\n\t"
|
|
|
|
"ld $14,0x70($31)\n\t"
|
|
|
|
"ld $15,0x78($31)\n\t"
|
|
|
|
"ld $16,0x80($31)\n\t"
|
|
|
|
"ld $17,0x88($31)\n\t"
|
|
|
|
"ld $18,0x90($31)\n\t"
|
|
|
|
"ld $19,0x98($31)\n\t"
|
|
|
|
"ld $20,0xA0($31)\n\t"
|
|
|
|
"ld $21,0xA8($31)\n\t"
|
|
|
|
"ld $22,0xB0($31)\n\t"
|
|
|
|
"ld $23,0xB8($31)\n\t"
|
|
|
|
"ld $24,0xC0($31)\n\t"
|
|
|
|
"ld $25,0xC8($31)\n\t"
|
|
|
|
"ld $26,0xD0($31)\n\t"
|
|
|
|
"ld $27,0xD8($31)\n\t"
|
|
|
|
"ld $28,0xE0($31)\n\t"
|
|
|
|
"ld $29,0xE8($31)\n\t"
|
|
|
|
"ld $30,0xF0($31)\n\t"
|
|
|
|
"ld $31,0xF8($31)\n\t"
|
|
|
|
"jr $11\n\t"
|
|
|
|
"nop\n"
|
|
|
|
"9:\n"
|
|
|
|
::: "$8" );
|
|
|
|
}
|