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Jarno Lehtinen fd72e6e605
Update 4joy_adapter.ino
1 month ago
4joy_adapter.ino Update 4joy_adapter.ino 1 month ago
4joy_adapter_old.ino Rename 4joy_adapter.ino to 4joy_adapter_old.ino 3 years ago
4joy_adapter_old2.ino Rename 4joy_adapter.ino to 4joy_adapter_old2.ino 1 month ago
4joy_adapter_old3.ino Rename 4joy_adapter.ino to 4joy_adapter_old3.ino 1 month ago Update 1 month ago
interrupt_test.ino Create interrupt_test.ino 3 years ago
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& 'C:\Program Files (x86)\Arduino\hardware\tools\avr\bin\avr-objdump.exe' -S "C:\\Users\\lehti\\AppData\\Local\\Temp\\arduino_build_208947/c64_4joystick-adapter.ino.elf" > c:\temp\koe.txt
 cli // 1 clock
 PORTB = *ptr; // is this atomic? probably, because ptr is 6-bit pointer. nope...
 f98:	e0 91 26 01 	lds	r30, 0x0126	; 0x800126 <__data_end> // 2 clocks
 f9c:	f0 91 27 01 	lds	r31, 0x0127	; 0x800127 <__data_end+0x1> // 2 clocks
 fa0:	80 81       	ld	r24, Z // 1 clock
 fa2:	85 b9       	out	0x05, r24	; 5 // 1 clock
 sei // 1 clock


mov r31, r1
mov r30, gpior0
ld	r24, Z
out	0x05, r24



using data/i/o space

  • lds can load from io (if +0x20 added to address) or data space
  • sts can store from register to io (if +0x20 added to address) or data space
  • in can load from io to register
  • out can write from register to io
  • only one io/data address space access within one instruction?
  • lds/sts takes 2 cycles and in/out takes 1 cycle? ldi takes 1 cycle?
  • lds/sts: "M" _SFR_MEM_ADDR(GPIOR2), in/out: "I" _SFR_IO_ADDR(GPIOR0)


This is from the datasheet for the AT90USB82 processor; things in parenthesis are from me...

-The interrupt execution response for all the enabled AVR interrupts is five clock cycles minimum (the processor is fixin' to execute the interrupt)
-The vector is normally a jump to the interrupt routine, and this jump takes three clock cycles (the processor jumps to the ISR)
-SREG must be saved and restored (the processor doesn't do this for us and SREG is important)
-A return from an interrupt handling routine takes three clock cycles
-When the AVR exits from an interrupt, it will always return to the main program and execute one more instruction before any pending interrupt is served

Those are the things necessary just to get the ISR called. We have not yet added the application stuff (incrementing an unsigned long in BetterSense's case).

Adding those up gives us 5+3+2+3+1 = 14. The absolute maximum number of interrupts per second that can be handled by the AT90USB82 is 16 million instructions per second / 14 instructions per interrupt = 1,142,857 interrupts per second.

avr asm


register as variable

running code from ram

  • "AVRs are Harvard architecture CPUs, so they CANNOT run code out of RAM, so that directive can't possibly do anything of any value whatsoever."
  • "Yes, Harvard IS the reason. A Harvard CPU, by definition, has separate code and data memory spaces. They execute code from one memory, and fetch data from a different memory. What you're seeing is most likely the compiler pretending the directive can do what you want, but the linker doing the only thing it can do - putting that code in FLASH."