mirror of
https://github.com/gdsports/USBHost_t36
synced 2024-11-21 16:45:04 -05:00
591 lines
20 KiB
C++
591 lines
20 KiB
C++
/* USB EHCI Host for Teensy 3.6
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* Copyright 2017 Paul Stoffregen (paul@pjrc.com)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <Arduino.h>
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#include "USBHost.h"
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static uint32_t periodictable[32] __attribute__ ((aligned(4096), used));
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static uint8_t port_state;
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#define PORT_STATE_DISCONNECTED 0
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#define PORT_STATE_DEBOUNCE 1
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#define PORT_STATE_RESET 2
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#define PORT_STATE_RECOVERY 3
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#define PORT_STATE_ACTIVE 4
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static Device_t *rootdev=NULL;
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static Transfer_t *async_followup_first=NULL;
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static Transfer_t *async_followup_last=NULL;
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static Transfer_t *periodic_followup_first=NULL;
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static Transfer_t *periodic_followup_last=NULL;
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static void init_qTD(volatile Transfer_t *t, void *buf, uint32_t len,
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uint32_t pid, uint32_t data01, bool irq);
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static bool followup_Transfer(Transfer_t *transfer);
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static void add_to_async_followup_list(Transfer_t *first, Transfer_t *last);
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static void remove_from_async_followup_list(Transfer_t *transfer);
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static void add_to_periodic_followup_list(Transfer_t *first, Transfer_t *last);
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static void remove_from_periodic_followup_list(Transfer_t *transfer);
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void USBHost::begin()
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{
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// Teensy 3.6 has USB host power controlled by PTE6
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PORTE_PCR6 = PORT_PCR_MUX(1);
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GPIOE_PDDR |= (1<<6);
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GPIOE_PSOR = (1<<6); // turn on USB host power
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Serial.print("sizeof Device = ");
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Serial.println(sizeof(Device_t));
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Serial.print("sizeof Pipe = ");
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Serial.println(sizeof(Pipe_t));
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Serial.print("sizeof Transfer = ");
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Serial.println(sizeof(Transfer_t));
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// configure the MPU to allow USBHS DMA to access memory
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MPU_RGDAAC0 |= 0x30000000;
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Serial.print("MPU_RGDAAC0 = ");
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Serial.println(MPU_RGDAAC0, HEX);
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// turn on clocks
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MCG_C1 |= MCG_C1_IRCLKEN; // enable MCGIRCLK 32kHz
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OSC0_CR |= OSC_ERCLKEN;
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SIM_SOPT2 |= SIM_SOPT2_USBREGEN; // turn on USB regulator
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SIM_SOPT2 &= ~SIM_SOPT2_USBSLSRC; // use IRC for slow clock
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print("power up USBHS PHY");
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SIM_USBPHYCTL |= SIM_USBPHYCTL_USBDISILIM; // disable USB current limit
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//SIM_USBPHYCTL = SIM_USBPHYCTL_USBDISILIM | SIM_USBPHYCTL_USB3VOUTTRG(6); // pg 237
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SIM_SCGC3 |= SIM_SCGC3_USBHSDCD | SIM_SCGC3_USBHSPHY | SIM_SCGC3_USBHS;
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USBHSDCD_CLOCK = 33 << 2;
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print("init USBHS PHY & PLL");
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// init process: page 1681-1682
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USBPHY_CTRL_CLR = (USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE); // // CTRL pg 1698
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USBPHY_CTRL_SET = USBPHY_CTRL_ENUTMILEVEL2 | USBPHY_CTRL_ENUTMILEVEL3;
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//USBPHY_CTRL_SET = USBPHY_CTRL_FSDLL_RST_EN; // TODO: what does this do??
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USBPHY_TRIM_OVERRIDE_EN_SET = 1;
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USBPHY_PLL_SIC = USBPHY_PLL_SIC_PLL_POWER | USBPHY_PLL_SIC_PLL_ENABLE |
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USBPHY_PLL_SIC_PLL_DIV_SEL(1) | USBPHY_PLL_SIC_PLL_EN_USB_CLKS;
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// wait for the PLL to lock
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int count=0;
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while ((USBPHY_PLL_SIC & USBPHY_PLL_SIC_PLL_LOCK) == 0) {
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count++;
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}
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Serial.print("PLL locked, waited ");
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Serial.println(count);
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// turn on power to PHY
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USBPHY_PWD = 0;
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delay(10);
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// sanity check, connect 470K pullup & 100K pulldown and watch D+ voltage change
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//USBPHY_ANACTRL_CLR = (1<<10); // turn off both 15K pulldowns... works! :)
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// sanity check, output clocks on pin 9 for testing
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//SIM_SOPT2 = SIM_SOPT2 & (~SIM_SOPT2_CLKOUTSEL(7)) | SIM_SOPT2_CLKOUTSEL(3); // LPO 1kHz
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//SIM_SOPT2 = SIM_SOPT2 & (~SIM_SOPT2_CLKOUTSEL(7)) | SIM_SOPT2_CLKOUTSEL(2); // Flash
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//SIM_SOPT2 = SIM_SOPT2 & (~SIM_SOPT2_CLKOUTSEL(7)) | SIM_SOPT2_CLKOUTSEL(6); // XTAL
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//SIM_SOPT2 = SIM_SOPT2 & (~SIM_SOPT2_CLKOUTSEL(7)) | SIM_SOPT2_CLKOUTSEL(7); // IRC 48MHz
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//SIM_SOPT2 = SIM_SOPT2 & (~SIM_SOPT2_CLKOUTSEL(7)) | SIM_SOPT2_CLKOUTSEL(4); // MCGIRCLK
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//CORE_PIN9_CONFIG = PORT_PCR_MUX(5); // CLKOUT on PTC3 Alt5 (Arduino pin 9)
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// now with the PHY up and running, start up USBHS
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print("begin ehci reset");
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USBHS_USBCMD |= USBHS_USBCMD_RST;
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count = 0;
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while (USBHS_USBCMD & USBHS_USBCMD_RST) {
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count++;
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}
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print(" reset waited ", count);
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init_Device_Pipe_Transfer_memory();
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for (int i=0; i < 32; i++) {
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periodictable[i] = 1;
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}
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port_state = PORT_STATE_DISCONNECTED;
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USBHS_USB_SBUSCFG = 1; // System Bus Interface Configuration
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// turn on the USBHS controller
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//USBHS_USBMODE = USBHS_USBMODE_TXHSD(5) | USBHS_USBMODE_CM(3); // host mode
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USBHS_USBMODE = USBHS_USBMODE_CM(3); // host mode
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USBHS_USBINTR = 0;
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USBHS_PERIODICLISTBASE = (uint32_t)periodictable;
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USBHS_FRINDEX = 0;
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USBHS_ASYNCLISTADDR = 0;
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USBHS_USBCMD = USBHS_USBCMD_ITC(8) | USBHS_USBCMD_RS |
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USBHS_USBCMD_ASP(3) | USBHS_USBCMD_ASPE |
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USBHS_USBCMD_FS2 | USBHS_USBCMD_FS(1); // periodic table is 32 pointers
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// turn on the USB port
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//USBHS_PORTSC1 = USBHS_PORTSC_PP;
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USBHS_PORTSC1 |= USBHS_PORTSC_PP;
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//USBHS_PORTSC1 |= USBHS_PORTSC_PFSC; // force 12 Mbit/sec
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//USBHS_PORTSC1 |= USBHS_PORTSC_PHCD; // phy off
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Serial.print("USBHS_ASYNCLISTADDR = ");
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Serial.println(USBHS_ASYNCLISTADDR, HEX);
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Serial.print("USBHS_PERIODICLISTBASE = ");
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Serial.println(USBHS_PERIODICLISTBASE, HEX);
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Serial.print("periodictable = ");
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Serial.println((uint32_t)periodictable, HEX);
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// enable interrupts, after this point interruts to all the work
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attachInterruptVector(IRQ_USBHS, isr);
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NVIC_ENABLE_IRQ(IRQ_USBHS);
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USBHS_USBINTR = USBHS_USBINTR_PCE | USBHS_USBINTR_TIE0;
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USBHS_USBINTR |= USBHS_USBINTR_UEE | USBHS_USBINTR_SEE;
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USBHS_USBINTR |= USBHS_USBINTR_AAE;
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USBHS_USBINTR |= USBHS_USBINTR_UPIE | USBHS_USBINTR_UAIE;
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}
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// EHCI registers page default
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// -------------- ---- -------
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// USBHS_USBCMD 1599 00080000 USB Command
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// USBHS_USBSTS 1602 00000000 USB Status
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// USBHS_USBINTR 1606 00000000 USB Interrupt Enable
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// USBHS_FRINDEX 1609 00000000 Frame Index Register
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// USBHS_PERIODICLISTBASE 1610 undefine Periodic Frame List Base Address
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// USBHS_ASYNCLISTADDR 1612 undefine Asynchronous List Address
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// USBHS_PORTSC1 1619 00002000 Port Status and Control
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// USBHS_USBMODE 1629 00005000 USB Mode
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// USBHS_GPTIMERnCTL 1591 00000000 General Purpose Timer n Control
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// PORT_STATE_DISCONNECTED 0
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// PORT_STATE_DEBOUNCE 1
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// PORT_STATE_RESET 2
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// PORT_STATE_RECOVERY 3
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// PORT_STATE_ACTIVE 4
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void USBHost::isr()
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{
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uint32_t stat = USBHS_USBSTS;
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USBHS_USBSTS = stat; // clear pending interrupts
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//stat &= USBHS_USBINTR; // mask away unwanted interrupts
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Serial.println();
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Serial.print("ISR: ");
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Serial.print(stat, HEX);
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Serial.println();
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if (stat & USBHS_USBSTS_UI) Serial.println(" USB Interrupt");
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if (stat & USBHS_USBSTS_UEI) Serial.println(" USB Error");
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if (stat & USBHS_USBSTS_PCI) Serial.println(" Port Change");
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if (stat & USBHS_USBSTS_FRI) Serial.println(" Frame List Rollover");
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if (stat & USBHS_USBSTS_SEI) Serial.println(" System Error");
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if (stat & USBHS_USBSTS_AAI) Serial.println(" Async Advance (doorbell)");
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if (stat & USBHS_USBSTS_URI) Serial.println(" Reset Recv");
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if (stat & USBHS_USBSTS_SRI) Serial.println(" SOF");
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if (stat & USBHS_USBSTS_SLI) Serial.println(" Suspend");
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if (stat & USBHS_USBSTS_HCH) Serial.println(" Host Halted");
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if (stat & USBHS_USBSTS_RCL) Serial.println(" Reclamation");
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if (stat & USBHS_USBSTS_PS) Serial.println(" Periodic Sched En");
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if (stat & USBHS_USBSTS_AS) Serial.println(" Async Sched En");
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if (stat & USBHS_USBSTS_NAKI) Serial.println(" NAK");
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if (stat & USBHS_USBSTS_UAI) Serial.println(" USB Async");
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if (stat & USBHS_USBSTS_UPI) Serial.println(" USB Periodic");
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if (stat & USBHS_USBSTS_TI0) Serial.println(" Timer0");
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if (stat & USBHS_USBSTS_TI1) Serial.println(" Timer1");
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if (stat & USBHS_USBSTS_UAI) { // completed qTD(s) from the async schedule
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Serial.println("Async Followup");
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print(async_followup_first, async_followup_last);
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Transfer_t *p = async_followup_first;
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while (p) {
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if (followup_Transfer(p)) {
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// transfer completed
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Transfer_t *next = p->next_followup;
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remove_from_async_followup_list(p);
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free_Transfer(p);
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p = next;
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} else {
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// transfer still pending
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p = p->next_followup;
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}
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}
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print(async_followup_first, async_followup_last);
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}
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if (stat & USBHS_USBSTS_UPI) { // completed qTD(s) from the periodic schedule
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Serial.println("Periodic Followup");
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Transfer_t *p = periodic_followup_first;
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while (p) {
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if (followup_Transfer(p)) {
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// transfer completed
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Transfer_t *next = p->next_followup;
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remove_from_periodic_followup_list(p);
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free_Transfer(p);
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p = next;
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} else {
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// transfer still pending
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p = p->next_followup;
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}
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}
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}
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if (stat & USBHS_USBSTS_PCI) { // port change detected
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const uint32_t portstat = USBHS_PORTSC1;
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Serial.print("port change: ");
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Serial.print(portstat, HEX);
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Serial.println();
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USBHS_PORTSC1 = portstat | (USBHS_PORTSC_OCC|USBHS_PORTSC_PEC|USBHS_PORTSC_CSC);
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if (portstat & USBHS_PORTSC_OCC) {
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Serial.println(" overcurrent change");
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}
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if (portstat & USBHS_PORTSC_CSC) {
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if (portstat & USBHS_PORTSC_CCS) {
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Serial.println(" connect");
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if (port_state == PORT_STATE_DISCONNECTED
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|| port_state == PORT_STATE_DEBOUNCE) {
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// 100 ms debounce (USB 2.0: TATTDB, page 150 & 188)
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port_state = PORT_STATE_DEBOUNCE;
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USBHS_GPTIMER0LD = 100000; // microseconds
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USBHS_GPTIMER0CTL =
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USBHS_GPTIMERCTL_RST | USBHS_GPTIMERCTL_RUN;
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stat &= ~USBHS_USBSTS_TI0;
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}
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} else {
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Serial.println(" disconnect");
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port_state = PORT_STATE_DISCONNECTED;
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USBPHY_CTRL_CLR = USBPHY_CTRL_ENHOSTDISCONDETECT;
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// TODO: delete & clean up device state...
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}
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}
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if (portstat & USBHS_PORTSC_PEC) {
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// PEC bit only detects disable
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Serial.println(" disable");
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} else if (port_state == PORT_STATE_RESET && portstat & USBHS_PORTSC_PE) {
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Serial.println(" port enabled");
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port_state = PORT_STATE_RECOVERY;
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// 10 ms reset recover (USB 2.0: TRSTRCY, page 151 & 188)
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USBHS_GPTIMER0LD = 10000; // microseconds
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USBHS_GPTIMER0CTL = USBHS_GPTIMERCTL_RST | USBHS_GPTIMERCTL_RUN;
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if (USBHS_PORTSC1 & USBHS_PORTSC_HSP) {
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// turn on high-speed disconnect detector
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USBPHY_CTRL_SET = USBPHY_CTRL_ENHOSTDISCONDETECT;
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}
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}
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if (portstat & USBHS_PORTSC_FPR) {
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Serial.println(" force resume");
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}
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}
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if (stat & USBHS_USBSTS_TI0) { // timer 0
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Serial.println("timer");
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if (port_state == PORT_STATE_DEBOUNCE) {
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port_state = PORT_STATE_RESET;
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USBHS_PORTSC1 |= USBHS_PORTSC_PR; // begin reset sequence
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Serial.println(" begin reset");
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} else if (port_state == PORT_STATE_RECOVERY) {
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port_state = PORT_STATE_ACTIVE;
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Serial.println(" end recovery");
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// HCSPARAMS TTCTRL page 1671
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uint32_t speed = (USBHS_PORTSC1 >> 26) & 3;
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rootdev = new_Device(speed, 0, 0);
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}
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}
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}
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static uint32_t QH_capabilities1(uint32_t nak_count_reload, uint32_t control_endpoint_flag,
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uint32_t max_packet_length, uint32_t head_of_list, uint32_t data_toggle_control,
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uint32_t speed, uint32_t endpoint_number, uint32_t inactivate, uint32_t address)
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{
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return ( (nak_count_reload << 28) | (control_endpoint_flag << 27) |
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(max_packet_length << 16) | (head_of_list << 15) |
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(data_toggle_control << 14) | (speed << 12) | (endpoint_number << 8) |
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(inactivate << 7) | (address << 0) );
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}
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static uint32_t QH_capabilities2(uint32_t high_bw_mult, uint32_t hub_port_number,
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uint32_t hub_address, uint32_t split_completion_mask, uint32_t interrupt_schedule_mask)
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{
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return ( (high_bw_mult << 30) | (hub_port_number << 23) | (hub_address << 16) |
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(split_completion_mask << 8) | (interrupt_schedule_mask << 0) );
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}
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// Create a new pipe. It's QH is added to the async or periodic schedule,
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// and a halt qTD is added to the QH, so we can grow the qTD list later.
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//
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Pipe_t * USBHost::new_Pipe(Device_t *dev, uint32_t type, uint32_t endpoint,
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uint32_t direction, uint32_t max_packet_len)
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{
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Pipe_t *pipe;
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Transfer_t *halt;
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uint32_t c=0, dtc=0;
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Serial.println("new_Pipe");
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pipe = allocate_Pipe();
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if (!pipe) return NULL;
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halt = allocate_Transfer();
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if (!halt) {
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free_Pipe(pipe);
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return NULL;
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}
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memset(pipe, 0, sizeof(Pipe_t));
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memset(halt, 0, sizeof(Transfer_t));
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halt->qtd.next = 1;
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halt->qtd.token = 0x40;
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pipe->device = dev;
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pipe->qh.next = (uint32_t)halt;
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pipe->qh.alt_next = 1;
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pipe->direction = direction;
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pipe->type = type;
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if (type == 0) {
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// control
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if (dev->speed < 2) c = 1;
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dtc = 1;
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} else if (type == 2) {
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// bulk
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} else if (type == 3) {
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// interrupt
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}
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pipe->qh.capabilities[0] = QH_capabilities1(15, c, max_packet_len, 0,
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dtc, dev->speed, endpoint, 0, dev->address);
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pipe->qh.capabilities[1] = QH_capabilities2(1, dev->hub_port,
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dev->hub_address, 0, 0);
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if (type == 0 || type == 2) {
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// control or bulk: add to async queue
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Pipe_t *list = (Pipe_t *)USBHS_ASYNCLISTADDR;
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if (list == NULL) {
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pipe->qh.capabilities[0] |= 0x8000; // H bit
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pipe->qh.horizontal_link = (uint32_t)&(pipe->qh) | 2; // 2=QH
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USBHS_ASYNCLISTADDR = (uint32_t)&(pipe->qh);
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USBHS_USBCMD |= USBHS_USBCMD_ASE; // enable async schedule
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Serial.println(" first in async list");
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} else {
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// EHCI 1.0: section 4.8.1, page 72
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pipe->qh.horizontal_link = list->qh.horizontal_link;
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list->qh.horizontal_link = (uint32_t)&(pipe->qh) | 2;
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Serial.println(" added to async list");
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}
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} else if (type == 3) {
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// interrupt: add to periodic schedule
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// TODO: link it into the periodic table
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}
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return pipe;
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}
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// Fill in the qTD fields (token & data)
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// t the Transfer qTD to initialize
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// buf data to transfer
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// len length of data
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// pid type of packet: 0=OUT, 1=IN, 2=SETUP
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// data01 value of DATA0/DATA1 toggle on 1st packet
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// irq whether to generate an interrupt when transfer complete
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//
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static void init_qTD(volatile Transfer_t *t, void *buf, uint32_t len,
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uint32_t pid, uint32_t data01, bool irq)
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{
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t->qtd.alt_next = 1; // 1=terminate
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if (data01) data01 = 0x80000000;
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t->qtd.token = data01 | (len << 16) | (irq ? 0x8000 : 0) | (pid << 8) | 0x80;
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uint32_t addr = (uint32_t)buf;
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t->qtd.buffer[0] = addr;
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addr &= 0xFFFFF000;
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t->qtd.buffer[1] = addr + 0x1000;
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t->qtd.buffer[2] = addr + 0x2000;
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t->qtd.buffer[3] = addr + 0x3000;
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t->qtd.buffer[4] = addr + 0x4000;
|
|
}
|
|
|
|
|
|
// Create a Transfer and queue it
|
|
//
|
|
bool USBHost::new_Transfer(Pipe_t *pipe, void *buffer, uint32_t len)
|
|
{
|
|
Serial.println("new_Transfer");
|
|
Transfer_t *transfer = allocate_Transfer();
|
|
if (!transfer) return false;
|
|
if (pipe->type == 0) {
|
|
// control transfer
|
|
Transfer_t *data, *status;
|
|
uint32_t status_direction;
|
|
if (len > 16384) {
|
|
// hopefully we never need more
|
|
// than 16K in a control transfer
|
|
free_Transfer(transfer);
|
|
return false;
|
|
}
|
|
status = allocate_Transfer();
|
|
if (!status) {
|
|
free_Transfer(transfer);
|
|
return false;
|
|
}
|
|
if (len > 0) {
|
|
data = allocate_Transfer();
|
|
if (!data) {
|
|
free_Transfer(transfer);
|
|
free_Transfer(status);
|
|
return false;
|
|
}
|
|
init_qTD(data, buffer, len, pipe->direction, 1, false);
|
|
transfer->qtd.next = (uint32_t)data;
|
|
data->qtd.next = (uint32_t)status;
|
|
status_direction = pipe->direction ^ 1;
|
|
} else {
|
|
transfer->qtd.next = (uint32_t)status;
|
|
status_direction = 1; // always IN, USB 2.0 page 226
|
|
}
|
|
Serial.print("setup address ");
|
|
Serial.println((uint32_t)&pipe->device->setup, HEX);
|
|
init_qTD(transfer, &pipe->device->setup, 8, 2, 0, false);
|
|
init_qTD(status, NULL, 0, status_direction, 1, true);
|
|
status->pipe = pipe;
|
|
status->buffer = buffer;
|
|
status->length = len;
|
|
status->qtd.next = 1;
|
|
} else {
|
|
// bulk, interrupt or isochronous transfer
|
|
free_Transfer(transfer);
|
|
return false;
|
|
}
|
|
// find halt qTD
|
|
Transfer_t *halt = (Transfer_t *)(pipe->qh.next);
|
|
while (!(halt->qtd.token & 0x40)) halt = (Transfer_t *)(halt->qtd.next);
|
|
// transfer's token
|
|
uint32_t token = transfer->qtd.token;
|
|
// transfer becomes new halt qTD
|
|
transfer->qtd.token = 0x40;
|
|
// copy transfer non-token fields to halt
|
|
halt->qtd.next = transfer->qtd.next;
|
|
halt->qtd.alt_next = transfer->qtd.alt_next;
|
|
halt->qtd.buffer[0] = transfer->qtd.buffer[0]; // TODO: optimize...
|
|
halt->qtd.buffer[1] = transfer->qtd.buffer[1];
|
|
halt->qtd.buffer[2] = transfer->qtd.buffer[2];
|
|
halt->qtd.buffer[3] = transfer->qtd.buffer[3];
|
|
halt->qtd.buffer[4] = transfer->qtd.buffer[4];
|
|
halt->pipe = pipe;
|
|
// find the last qTD we're adding
|
|
Transfer_t *last = halt;
|
|
while ((uint32_t)(last->qtd.next) != 1) last = (Transfer_t *)(last->qtd.next);
|
|
// last points to transfer (which becomes new halt)
|
|
last->qtd.next = (uint32_t)transfer;
|
|
transfer->qtd.next = 1;
|
|
// link all the new qTD by next_followup & prev_followup
|
|
Transfer_t *prev = NULL;
|
|
Transfer_t *p = halt;
|
|
while (p->qtd.next != (uint32_t)transfer) {
|
|
Transfer_t *next = (Transfer_t *)p->qtd.next;
|
|
p->prev_followup = prev;
|
|
p->next_followup = next;
|
|
prev = p;
|
|
p = next;
|
|
}
|
|
p->prev_followup = prev;
|
|
p->next_followup = NULL;
|
|
print(halt, p);
|
|
// add them to a followup list
|
|
if (pipe->type == 0 || pipe->type == 2) {
|
|
// control or bulk
|
|
add_to_async_followup_list(halt, p);
|
|
} else {
|
|
// interrupt
|
|
add_to_periodic_followup_list(halt, p);
|
|
}
|
|
// old halt becomes new transfer, this commits all new qTDs to QH
|
|
halt->qtd.token = token;
|
|
return true;
|
|
}
|
|
|
|
static bool followup_Transfer(Transfer_t *transfer)
|
|
{
|
|
Serial.print(" Followup ");
|
|
Serial.println((uint32_t)transfer, HEX);
|
|
|
|
if (!(transfer->qtd.token & 0x80)) {
|
|
// TODO: check error status
|
|
if (transfer->qtd.token & 0x8000) {
|
|
// this transfer caused an interrupt
|
|
if (transfer->pipe->callback_function) {
|
|
// do the callback
|
|
(*(transfer->pipe->callback_function))(transfer);
|
|
}
|
|
}
|
|
// do callback function...
|
|
Serial.println(" completed");
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
static void add_to_async_followup_list(Transfer_t *first, Transfer_t *last)
|
|
{
|
|
last->next_followup = NULL; // always add to end of list
|
|
if (async_followup_last == NULL) {
|
|
first->prev_followup = NULL;
|
|
async_followup_first = first;
|
|
} else {
|
|
first->prev_followup = async_followup_last;
|
|
async_followup_last->next_followup = first;
|
|
}
|
|
async_followup_last = last;
|
|
}
|
|
|
|
static void remove_from_async_followup_list(Transfer_t *transfer)
|
|
{
|
|
Transfer_t *next = transfer->next_followup;
|
|
Transfer_t *prev = transfer->prev_followup;
|
|
if (prev) {
|
|
prev->next_followup = next;
|
|
} else {
|
|
async_followup_first = next;
|
|
}
|
|
if (next) {
|
|
next->prev_followup = prev;
|
|
} else {
|
|
async_followup_last = prev;
|
|
}
|
|
}
|
|
|
|
static void add_to_periodic_followup_list(Transfer_t *first, Transfer_t *last)
|
|
{
|
|
last->next_followup = NULL; // always add to end of list
|
|
if (periodic_followup_last == NULL) {
|
|
first->prev_followup = NULL;
|
|
periodic_followup_first = first;
|
|
} else {
|
|
first->prev_followup = periodic_followup_last;
|
|
periodic_followup_last->next_followup = first;
|
|
}
|
|
periodic_followup_last = last;
|
|
}
|
|
|
|
static void remove_from_periodic_followup_list(Transfer_t *transfer)
|
|
{
|
|
Transfer_t *next = transfer->next_followup;
|
|
Transfer_t *prev = transfer->prev_followup;
|
|
if (prev) {
|
|
prev->next_followup = next;
|
|
} else {
|
|
periodic_followup_first = next;
|
|
}
|
|
if (next) {
|
|
next->prev_followup = prev;
|
|
} else {
|
|
periodic_followup_last = prev;
|
|
}
|
|
}
|
|
|