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https://github.com/gdsports/USBHost_t36
synced 2024-11-25 02:22:17 -05:00
FTDI transmit, full packets only
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commit
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@ -755,6 +755,7 @@ public:
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virtual int read(void);
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virtual int read(void);
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virtual int availableForWrite();
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virtual int availableForWrite();
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virtual size_t write(uint8_t c);
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virtual size_t write(uint8_t c);
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using Print::write;
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protected:
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protected:
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virtual bool claim(Device_t *device, int type, const uint8_t *descriptors, uint32_t len);
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virtual bool claim(Device_t *device, int type, const uint8_t *descriptors, uint32_t len);
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virtual void control(const Transfer_t *transfer);
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virtual void control(const Transfer_t *transfer);
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69
serial.cpp
69
serial.cpp
@ -78,6 +78,7 @@ bool USBSerial::claim(Device_t *dev, int type, const uint8_t *descriptors, uint3
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queue_Data_Transfer(rxpipe, rx2, 64, this);
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queue_Data_Transfer(rxpipe, rx2, 64, this);
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rxstate = 3;
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rxstate = 3;
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}
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}
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txstate = 0;
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txpipe->callback_function = tx_callback;
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txpipe->callback_function = tx_callback;
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baudrate = 115200;
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baudrate = 115200;
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pending_control = 0x0F;
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pending_control = 0x0F;
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@ -236,6 +237,8 @@ void USBSerial::rx_data(const Transfer_t *transfer)
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}
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}
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rxhead = head;
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rxhead = head;
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}
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}
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// TODO: can be this more efficient? We know from above which
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// buffer is no longer queued, so possible skip most of this work?
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rx_queue_packets(head, tail);
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rx_queue_packets(head, tail);
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}
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}
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@ -271,7 +274,14 @@ void USBSerial::rx_queue_packets(uint32_t head, uint32_t tail)
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void USBSerial::tx_data(const Transfer_t *transfer)
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void USBSerial::tx_data(const Transfer_t *transfer)
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{
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{
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println("tx: ");
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if (transfer->buffer == tx1) {
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println("tx1:");
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txstate &= 0xFE;
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} else if (transfer->buffer == tx2) {
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println("tx2:");
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txstate &= 0xFD;
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}
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// TODO: anything need to be done with latency timeout?
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}
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}
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@ -348,8 +358,57 @@ size_t USBSerial::write(uint8_t c)
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}
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}
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txbuf[head] = c;
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txbuf[head] = c;
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txhead = head;
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txhead = head;
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// TODO: if full packet in buffer and tx packet ready, queue it
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//print("head=", head);
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//println(", tail=", txtail);
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// if full packet in buffer and tx packet ready, queue it
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NVIC_DISABLE_IRQ(IRQ_USBHS);
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uint32_t tail = txtail;
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if ((txstate & 0x03) != 0x03) {
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// at least one packet buffer is ready to transmit
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uint32_t count;
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if (head >= tail) {
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count = head - tail;
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} else {
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count = txsize + head - tail;
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}
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uint32_t packetsize = tx2 - tx1;
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if (count >= packetsize) {
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//println("txsize=", txsize);
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uint8_t *p;
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if ((txstate & 0x01) == 0) {
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p = tx1;
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txstate |= 0x01;
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} else /* if ((txstate & 0x02) == 0) */ {
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p = tx2;
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txstate |= 0x02;
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}
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// copy data to packet buffer
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if (++tail >= txsize) tail = 0;
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uint32_t n = txsize - tail;
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if (n > packetsize) n = packetsize;
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//print("memcpy, offset=", tail);
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//println(", len=", n);
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memcpy(p, txbuf + tail, n);
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if (n >= packetsize) {
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tail += n - 1;
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if (tail >= txsize) tail = 0;
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} else {
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//n = txsize - n;
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uint32_t len = packetsize - n;
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//println("memcpy, offset=0, len=", len);
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memcpy(p + n, txbuf, len);
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tail = len - 1;
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}
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txtail = tail;
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//println("queue tx packet, newtail=", tail);
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queue_Data_Transfer(txpipe, p, packetsize, this);
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NVIC_ENABLE_IRQ(IRQ_USBHS);
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return 1;
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}
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}
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// TODO: otherwise set a latency timer to transmit partial packet
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// TODO: otherwise set a latency timer to transmit partial packet
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NVIC_ENABLE_IRQ(IRQ_USBHS);
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return 1;
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return 1;
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}
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}
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@ -370,12 +429,6 @@ size_t USBSerial::write(uint8_t c)
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