mirror of
https://github.com/gdsports/USBHost_t36
synced 2024-11-21 16:45:04 -05:00
Use interrupts & Device/Pipe/Transfer structs (still no data...)
This commit is contained in:
PaulStoffregen
parent
c98ba51e6d
commit
afa91af357
113
host.h
Normal file
113
host.h
Normal file
@ -0,0 +1,113 @@
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#include <stdint.h>
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typedef struct Device_struct Device_t;
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typedef struct Pipe_struct Pipe_t;
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typedef struct Transfer_struct Transfer_t;
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typedef union {
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struct {
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union {
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struct {
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uint8_t bmRequestType;
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uint8_t bRequest;
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};
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uint16_t wRequestAndType;
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};
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uint16_t wValue;
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uint16_t wIndex;
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uint16_t wLength;
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};
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struct {
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uint32_t word1;
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uint32_t word2;
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};
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} setup_t;
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struct Device_struct {
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Pipe_t *control_pipe;
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Device_t *next;
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setup_t setup;
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uint8_t speed; // 0=12, 1=1.5, 2=480 Mbit/sec
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uint8_t address;
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uint8_t hub_address;
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uint8_t hub_port;
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};
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struct Pipe_struct {
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// Queue Head (QH), EHCI page 46-50
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struct { // must be aligned to 32 byte boundary
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uint32_t horizontal_link;
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uint32_t capabilities[2];
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uint32_t current;
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uint32_t next;
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uint32_t alt_next;
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uint32_t token;
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uint32_t buffer[5];
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} qh;
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Device_t *device;
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uint8_t type; // 0=control, 1=isochronous, 2=bulk, 3=interrupt
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uint8_t direction; // 0=out, 1=in
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//uint8_t endpoint; // 0 to 15
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//uint8_t data01; // next packet DATA0 or DATA1
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uint8_t unusedbyte[2];
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uint32_t unused[2];
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};
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struct Transfer_struct {
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// Queue Element Transfer Descriptor (qTD), EHCI pg 40-45
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struct { // must be aligned to 32 byte boundary
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uint32_t next;
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uint32_t alt_next;
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uint32_t token;
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uint32_t buffer[5];
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} qtd;
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Pipe_t *pipe;
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void *callback;
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void *callback_arg;
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uint32_t unused[5];
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};
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#if 0
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#define EHCI_QH_CAPABILITIES1( \
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nak_count_reload, \
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control_endpoint_flag, \
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max_packet_length, \
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head_of_list, \
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data_toggle_control, \
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speed, \
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endpoint_number, \
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inactivate, \
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address) \
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( ((nak_count_reload) << 28) | \
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((control_endpoint_flag) << 27) | \
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((max_packet_length) << 16) | \
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((head_of_list) << 15) | \
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((data_toggle_control) << 14) | \
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((speed) << 12) | \
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((endpoint_number) << 8) | \
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((inactivate) << 7) | \
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((address) << 0) )
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#define EHCI_QH_CAPABILITIES2( \
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high_bw_mult, \
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hub_port_number, \
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hub_address, \
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split_completion_mask, \
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interrupt_schedule_mask) \
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( ((high_bw_mult) << 30) | \
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((hub_port_number) << 23) | \
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((hub_address) << 16) | \
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((split_completion_mask) << 8) | \
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((interrupt_schedule_mask) << 0) )
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#endif
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Device_t * allocate_Device(void);
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void free_Device(Device_t *q);
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Pipe_t * allocate_Pipe(void);
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void free_Pipe(Pipe_t *q);
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Transfer_t * allocate_Transfer(void);
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void free_Transfer(Transfer_t *q);
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416
k66_usbhost.ino
416
k66_usbhost.ino
@ -1,20 +1,15 @@
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// usb host experiments....
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#include "host.h"
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uint32_t periodictable[64] __attribute__ ((aligned(4096), used));
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volatile uint32_t qh[12] __attribute__ ((aligned(64)));
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uint32_t qtd_dummy[8] __attribute__ ((aligned(32)));
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uint32_t qtd_setup[8] __attribute__ ((aligned(32)));
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uint32_t qtd_in[8] __attribute__ ((aligned(32)));
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uint32_t qtd_outack[8] __attribute__ ((aligned(32)));
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uint32_t setupbuf[2] __attribute__ ((aligned(8)));
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uint32_t inbuf[16] __attribute__ ((aligned(64)));
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uint32_t periodictable[32] __attribute__ ((aligned(4096), used));
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uint8_t port_state;
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#define PORT_STATE_DISCONNECTED 0
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#define PORT_STATE_DEBOUNCE 1
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#define PORT_STATE_RESET 2
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#define PORT_STATE_RECOVERY 3
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#define PORT_STATE_ACTIVE 4
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Device_t *rootdev=NULL;
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void setup()
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{
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@ -28,8 +23,14 @@ void setup()
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GPIOE_PDDR |= (1<<6);
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GPIOE_PSOR = (1<<6); // turn on USB host power
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while (!Serial) ; // wait
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print("USB Host Testing");
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print_mpu();
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Serial.println("USB Host Testing");
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Serial.print("sizeof Device = ");
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Serial.println(sizeof(Device_t));
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Serial.print("sizeof Pipe = ");
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Serial.println(sizeof(Pipe_t));
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Serial.print("sizeof Transfer = ");
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Serial.println(sizeof(Transfer_t));
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MPU_RGDAAC0 |= 0x30000000;
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MCG_C1 |= MCG_C1_IRCLKEN; // enable MCGIRCLK 32kHz
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OSC0_CR |= OSC_ERCLKEN;
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@ -75,29 +76,9 @@ void setup()
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}
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print(" reset waited ", count);
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for (int i=0; i < 64; i++) {
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for (int i=0; i < 32; i++) {
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periodictable[i] = 1;
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}
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qh[0] = ((uint32_t)qh) | 2;
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qh[1] = 0x0040E000; // addr=0, ep=0
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qh[2] = 0x40000000;
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qh[3] = 0;
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qh[4] = 1;
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qh[5] = 1;
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qh[6] = 0x40;
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qh[7] = 0;
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qh[8] = 0;
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qh[9] = 0;
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qh[10] = 0;
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qh[11] = 0;
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qtd_dummy[0] = 1;
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qtd_dummy[1] = 1;
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qtd_dummy[2] = 0x40; // 0x40 = halted
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qtd_dummy[3] = 0;
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qtd_dummy[4] = 0;
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qtd_dummy[5] = 0;
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qtd_dummy[6] = 0;
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qtd_dummy[7] = 0;
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port_state = PORT_STATE_DISCONNECTED;
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// turn on the USBHS controller
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@ -105,11 +86,9 @@ void setup()
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USBHS_USBINTR = 0;
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USBHS_PERIODICLISTBASE = (uint32_t)periodictable;
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USBHS_FRINDEX = 0;
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USBHS_ASYNCLISTADDR = (uint32_t)qh;
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USBHS_ASYNCLISTADDR = 0;
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USBHS_USBCMD = USBHS_USBCMD_ITC(0) | USBHS_USBCMD_RS | USBHS_USBCMD_ASP(3) |
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USBHS_USBCMD_FS2 | USBHS_USBCMD_FS(0) | // periodic table is 64 pointers
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// USBHS_USBCMD_PSE |
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USBHS_USBCMD_ASE;
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USBHS_USBCMD_FS2 | USBHS_USBCMD_FS(1); // periodic table is 32 pointers
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//USBHS_PORTSC1 = USBHS_PORTSC_PP;
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USBHS_PORTSC1 |= USBHS_PORTSC_PP;
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@ -131,6 +110,11 @@ void setup()
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digitalWrite(32, HIGH); // connect device
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}
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void loop()
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{
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}
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void pulse(int usec)
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{
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// connect oscilloscope to see these pulses....
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@ -157,7 +141,7 @@ void pulse(int usec)
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// PORT_STATE_RECOVERY 3
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// PORT_STATE_ACTIVE 4
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void usbhs_isr(void) // USBHS_ISR_HOST
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void usbhs_isr(void)
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{
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uint32_t stat = USBHS_USBSTS;
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USBHS_USBSTS = stat; // clear pending interrupts
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@ -202,13 +186,11 @@ void usbhs_isr(void) // USBHS_ISR_HOST
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// 10 ms reset recover (USB 2.0: TRSTRCY, page 151 & 188)
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USBHS_GPTIMER0LD = 10000; // microseconds
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USBHS_GPTIMER0CTL = USBHS_GPTIMERCTL_RST | USBHS_GPTIMERCTL_RUN;
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}
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if (portstat & USBHS_PORTSC_FPR) {
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Serial.println(" force resume");
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}
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pulse(1);
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}
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if (stat & USBHS_USBSTS_TI0) { // timer 0
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@ -222,162 +204,214 @@ void usbhs_isr(void) // USBHS_ISR_HOST
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port_state = PORT_STATE_ACTIVE;
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Serial.println(" end recovery");
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// HCSPARAMS TTCTRL page 1671
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rootdev = new_Device((USBHS_PORTSC1 >> 26) & 3, 0, 0);
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}
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}
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}
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void port_status()
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Device_t * new_Device(uint32_t speed, uint32_t hub_addr, uint32_t hub_port)
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{
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uint32_t n;
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Device_t *dev;
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Serial.print("Port: ");
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n = USBHS_PORTSC1;
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if (n & USBHS_PORTSC_PR) {
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Serial.print("reset ");
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Serial.print("new_Device: ");
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switch (speed) {
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case 0: Serial.print("12"); break;
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case 1: Serial.print("1.5"); break;
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case 2: Serial.print("480"); break;
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default: Serial.print("??");
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}
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if (n & USBHS_PORTSC_PP) {
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Serial.print("on ");
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} else {
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Serial.print("off ");
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Serial.println(" Mbit/sec");
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dev = allocate_Device();
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if (!dev) return NULL;
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dev->speed = speed;
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dev->address = 1; // TODO: dynamic assign address
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dev->hub_address = hub_addr;
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dev->hub_port = hub_port;
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dev->control_pipe = new_Pipe(dev, 0, 0, 0, 8);
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if (!dev->control_pipe) {
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free_Device(dev);
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return NULL;
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}
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if (n & USBHS_PORTSC_PHCD) {
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Serial.print("phyoff ");
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static uint8_t buffer[8];
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dev->control_pipe->direction = 1; // 1=IN
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dev->setup.bmRequestType = 0x80;
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dev->setup.bRequest = 0x06; // 6=GET_DESCRIPTOR
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dev->setup.wValue = 0x0100;
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dev->setup.wIndex = 0x0000;
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dev->setup.wLength = 8;
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Transfer_t *transfer = new_Transfer(dev->control_pipe, buffer, 8);
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if (transfer) queue_Transfer(transfer);
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return dev;
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}
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static uint32_t QH_capabilities1(uint32_t nak_count_reload, uint32_t control_endpoint_flag,
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uint32_t max_packet_length, uint32_t head_of_list, uint32_t data_toggle_control,
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uint32_t speed, uint32_t endpoint_number, uint32_t inactivate, uint32_t address)
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{
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return ( (nak_count_reload << 28) | (control_endpoint_flag << 27) |
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(max_packet_length << 16) | (head_of_list << 15) |
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(data_toggle_control << 14) | (speed << 12) | (endpoint_number << 8) |
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(inactivate << 7) | (address << 0) );
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}
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static uint32_t QH_capabilities2(uint32_t high_bw_mult, uint32_t hub_port_number,
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uint32_t hub_address, uint32_t split_completion_mask, uint32_t interrupt_schedule_mask)
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{
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return ( (high_bw_mult << 30) | (hub_port_number << 23) | (hub_address << 16) |
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(split_completion_mask << 8) | (interrupt_schedule_mask << 0) );
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}
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Pipe_t * new_Pipe(Device_t *dev, uint32_t type, uint32_t endpoint, uint32_t direction,
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uint32_t max_packet_len)
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{
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Pipe_t *pipe;
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uint32_t c=0, dtc=0;
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Serial.println("new_Pipe");
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pipe = allocate_Pipe();
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if (!pipe) return NULL;
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pipe->qh.current = 0;
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pipe->qh.next = 1;
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pipe->qh.alt_next = 1;
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pipe->qh.token = 0;
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pipe->qh.buffer[0] = 0;
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pipe->qh.buffer[1] = 0;
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pipe->qh.buffer[2] = 0;
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pipe->qh.buffer[3] = 0;
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pipe->qh.buffer[4] = 0;
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if (pipe->type == 0) {
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// control
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if (dev->speed < 2) c = 1;
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dtc = 1;
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} else if (pipe->type == 2) {
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// bulk
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} else if (pipe->type == 3) {
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// interrupt
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}
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if (n & USBHS_PORTSC_PE) {
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if (n & USBHS_PORTSC_SUSP) {
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Serial.print("suspend ");
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pipe->qh.capabilities[0] = QH_capabilities1(15, c, max_packet_len, 0,
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dtc, dev->speed, endpoint, 0, dev->address);
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pipe->qh.capabilities[1] = QH_capabilities2(1, dev->hub_port,
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dev->hub_address, 0, 0);
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if (pipe->type == 0 || pipe->type == 2) {
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// control or bulk: add to async queue
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Pipe_t *list = (Pipe_t *)USBHS_ASYNCLISTADDR;
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if (list == NULL) {
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pipe->qh.capabilities[0] |= 0x8000; // H bit
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pipe->qh.horizontal_link = (uint32_t)&(pipe->qh) | 2; // 2=QH
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USBHS_ASYNCLISTADDR = (uint32_t)&(pipe->qh);
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USBHS_USBCMD |= USBHS_USBCMD_ASE; // enable async schedule
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Serial.println(" first in async list");
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} else {
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Serial.print("enable ");
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// EHCI 1.0: section 4.8.1, page 72
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pipe->qh.horizontal_link = list->qh.horizontal_link;
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list->qh.horizontal_link = (uint32_t)&(pipe->qh) | 2;
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Serial.println(" added to async list");
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}
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} else {
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Serial.print("disable ");
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}
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Serial.print("speed=");
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switch ((n >> 26) & 3) {
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case 0: Serial.print("12 Mbps "); break;
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case 1: Serial.print("1.5 Mbps "); break;
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case 2: Serial.print("480 Mbps "); break;
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default: Serial.print("(undef) ");
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}
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if (n & USBHS_PORTSC_HSP) {
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Serial.print("highspeed ");
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}
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if (n & USBHS_PORTSC_OCA) {
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Serial.print("overcurrent ");
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}
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if (n & USBHS_PORTSC_CCS) {
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Serial.print("connected ");
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} else {
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Serial.print("not-connected ");
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}
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// print info about the EHCI status
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Serial.print(" run=");
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Serial.print(USBHS_USBCMD & 1); // running mode
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Serial.print(",halt=");
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Serial.print((USBHS_USBSTS >> 12) & 1); // halted mode
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Serial.print(",err=");
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Serial.print((USBHS_USBSTS >> 4) & 1); // error encountered!
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Serial.print(",asyn=");
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Serial.print((USBHS_USBSTS >> 15) & 1); // running the async schedule
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Serial.print(",per=");
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Serial.print((USBHS_USBSTS >> 14) & 1); // running the periodic schedule
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Serial.print(",index=");
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Serial.print(USBHS_FRINDEX); // periodic index
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Serial.println();
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if (USBHS_USBSTS & 16) {
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print_mpu();
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USBHS_USBSTS = 16; // clear error
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} else if (pipe->type == 3) {
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// interrupt: add to periodic schedule
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// TODO: link it into the periodic table
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}
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return pipe;
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}
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void read_descriptor(uint16_t value, uint16_t index, uint32_t len)
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// Fill in the qTD fields (token & data)
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// t the Transfer qTD to initialize
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// buf data to transfer
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// len length of data
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// pid type of packet: 0=OUT, 1=IN, 2=SETUP
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// data01 value of DATA0/DATA1 toggle on 1st packet
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// irq whether to generate an interrupt when transfer complete
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//
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void init_qTD(volatile Transfer_t *t, void *buf, uint32_t len,
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uint32_t pid, uint32_t data01, bool irq)
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{
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uint32_t token;
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if (len > 512) len = 512;
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Serial.println("Read Device Descriptor...");
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qtd_setup[0] = (uint32_t)qtd_in;
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qtd_setup[1] = 1;
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qtd_setup[2] = 0x00080E80;
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qtd_setup[3] = (uint32_t)setupbuf;
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setupbuf[0] = (value << 16) | (0x06 << 8) | 0x80;
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setupbuf[1] = (len << 16) | index;
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qtd_in[0] = (uint32_t)qtd_outack;
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qtd_in[1] = 1;
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qtd_in[2] = 0x80000000 | (len << 16) | 0x0D80;
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qtd_in[3] = (uint32_t)inbuf;
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qtd_outack[0] = 1;
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||||
qtd_outack[1] = 1;
|
||||
qtd_outack[2] = 0x80400C80;
|
||||
qtd_outack[3] = 0;
|
||||
|
||||
// add to QH
|
||||
|
||||
// Save the content of the token field of the first qTD to be added
|
||||
token = qtd_setup[2];
|
||||
|
||||
// Change the token of the first qTD so its Halted bit is set as 1
|
||||
// and all other bits are zero
|
||||
qtd_setup[2] = 0x40;
|
||||
|
||||
// copy the content of the first qTD to the dummy qTD
|
||||
memcpy(qtd_dummy, qtd_setup, 32);
|
||||
|
||||
// Link the first qTD to the last of the qTD of the newly qTD list
|
||||
qtd_outack[0] = (uint32_t)qtd_setup;
|
||||
|
||||
// Restore the token value to the previous dummy qTD's oken field
|
||||
qtd_dummy[2] = token;
|
||||
// qtd_setup becomes the dummy token... so this only works once!
|
||||
|
||||
delay(1);
|
||||
Serial.println(qtd_dummy[2], HEX);
|
||||
Serial.println(qtd_in[2], HEX);
|
||||
Serial.println(qtd_outack[2], HEX);
|
||||
Serial.println(qtd_setup[2], HEX);
|
||||
|
||||
t->qtd.alt_next = 1; // 1=terminate
|
||||
if (data01) data01 = 0x80000000;
|
||||
t->qtd.token = data01 | (len << 16) | (irq ? 0x8000 : 0) | (pid << 8);
|
||||
uint32_t addr = (uint32_t)buf;
|
||||
t->qtd.buffer[0] = addr;
|
||||
addr &= 0xFFFFF000;
|
||||
t->qtd.buffer[1] = addr + 0x1000;
|
||||
t->qtd.buffer[2] = addr + 0x2000;
|
||||
t->qtd.buffer[3] = addr + 0x3000;
|
||||
t->qtd.buffer[4] = addr + 0x4000;
|
||||
}
|
||||
|
||||
|
||||
void loop()
|
||||
// Create a list of Transfers
|
||||
//
|
||||
Transfer_t * new_Transfer(Pipe_t *pipe, void *buffer, uint32_t len)
|
||||
{
|
||||
/*
|
||||
static unsigned int count=0;
|
||||
|
||||
port_status();
|
||||
delay(1);
|
||||
count++;
|
||||
if (count == 2) {
|
||||
Serial.println("Plug in device...");
|
||||
digitalWrite(32, HIGH); // connect device
|
||||
Serial.println("new_Transfer");
|
||||
Transfer_t *transfer = allocate_Transfer();
|
||||
if (!transfer) return NULL;
|
||||
transfer->pipe = pipe;
|
||||
if (pipe->type == 0) {
|
||||
// control transfer
|
||||
Transfer_t *data, *status;
|
||||
uint32_t status_direction;
|
||||
if (len > 16384) {
|
||||
free_Transfer(transfer);
|
||||
return NULL;
|
||||
}
|
||||
status = allocate_Transfer();
|
||||
if (!status) {
|
||||
free_Transfer(transfer);
|
||||
return NULL;
|
||||
}
|
||||
if (len > 0) {
|
||||
data = allocate_Transfer();
|
||||
if (!data) {
|
||||
free_Transfer(transfer);
|
||||
free_Transfer(status);
|
||||
return NULL;
|
||||
}
|
||||
init_qTD(data, buffer, len, pipe->direction, 1, false);
|
||||
transfer->qtd.next = (uint32_t)data;
|
||||
data->qtd.next = (uint32_t)status;
|
||||
data->pipe = pipe;
|
||||
status_direction = pipe->direction ^ 1;
|
||||
} else {
|
||||
transfer->qtd.next = (uint32_t)status;
|
||||
status_direction = 1; // always IN, USB 2.0 page 226
|
||||
}
|
||||
init_qTD(transfer, &(pipe->device->setup), 8, 2, 0, false);
|
||||
init_qTD(status, NULL, 0, status_direction, 1, true);
|
||||
status->pipe = pipe;
|
||||
status->qtd.next = 1;
|
||||
} else {
|
||||
// bulk, interrupt or isochronous transfer
|
||||
free_Transfer(transfer);
|
||||
return NULL;
|
||||
}
|
||||
if (count == 5) {
|
||||
Serial.println("Initiate Reset Sequence...");
|
||||
USBHS_PORTSC1 |= USBHS_PORTSC_PR;
|
||||
}
|
||||
if (count == 15) {
|
||||
Serial.println("End Reset Sequence...");
|
||||
USBHS_PORTSC1 &= ~USBHS_PORTSC_PR;
|
||||
}
|
||||
if (count == 22) {
|
||||
read_descriptor(1, 0, 8); // device descriptor
|
||||
}
|
||||
if (count > 500) {
|
||||
while (1) ; // stop here
|
||||
}
|
||||
*/
|
||||
return transfer;
|
||||
}
|
||||
|
||||
|
||||
void queue_Transfer(Transfer_t *transfer)
|
||||
{
|
||||
Serial.println("queue_Transfer");
|
||||
Pipe_t *pipe = transfer->pipe;
|
||||
Transfer_t *last = (Transfer_t *)(pipe->qh.next);
|
||||
if ((uint32_t)last & 1) {
|
||||
pipe->qh.next = (uint32_t)transfer;
|
||||
Serial.println(" first on QH");
|
||||
} else {
|
||||
while ((last->qtd.next & 1) == 0) last = (Transfer_t *)(last->qtd.next);
|
||||
last->qtd.next = (uint32_t)transfer;
|
||||
Serial.println(" added to qTD list");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
void print(const char *s)
|
||||
{
|
||||
Serial.println(s);
|
||||
@ -391,8 +425,42 @@ void print(const char *s, int num)
|
||||
delay(10);
|
||||
}
|
||||
|
||||
void print_mpu()
|
||||
|
||||
// Memory allocation... for now, just simplest leaky way to get started
|
||||
|
||||
Device_t * allocate_Device(void)
|
||||
{
|
||||
Serial.print("MPU: CESR=");
|
||||
Serial.println(MPU_CESR, HEX);
|
||||
static Device_t mem[3];
|
||||
static size_t count=0;
|
||||
if (count >= sizeof(mem)/sizeof(Device_t)) return NULL;
|
||||
return &mem[count++];
|
||||
}
|
||||
|
||||
void free_Device(Device_t *q)
|
||||
{
|
||||
}
|
||||
|
||||
Pipe_t * allocate_Pipe(void)
|
||||
{
|
||||
static Pipe_t mem[6] __attribute__ ((aligned(64)));
|
||||
static size_t count=0;
|
||||
if (count >= sizeof(mem)/sizeof(Pipe_t)) return NULL;
|
||||
return &mem[count++];
|
||||
}
|
||||
|
||||
void free_Pipe(Pipe_t *q)
|
||||
{
|
||||
}
|
||||
|
||||
Transfer_t * allocate_Transfer(void)
|
||||
{
|
||||
static Transfer_t mem[22] __attribute__ ((aligned(64)));
|
||||
static size_t count=0;
|
||||
if (count >= sizeof(mem)/sizeof(Transfer_t)) return NULL;
|
||||
return &mem[count++];
|
||||
}
|
||||
|
||||
void free_Transfer(Transfer_t *q)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user