mirror of
https://github.com/raphnet/gc_n64_usb-v3
synced 2024-11-13 20:55:03 -05:00
765 lines
17 KiB
C
765 lines
17 KiB
C
#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <avr/pgmspace.h>
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#include "usb.h"
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#define STATE_POWERED 0
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#define STATE_DEFAULT 1
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#define STATE_ADDRESS 2
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#define STATE_CONFIGURED 3
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static volatile uint8_t g_usb_suspend;
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static uint8_t g_ep0_buf[64];
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static uint8_t g_device_state = STATE_DEFAULT;
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static uint8_t g_current_config;
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static void *interrupt_data;
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static volatile int interrupt_data_len = -1;
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#define CONTROL_WRITE_BUFSIZE 64
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static struct usb_request control_write_rq;
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static volatile uint16_t control_write_len;
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static volatile uint8_t control_write_in_progress;
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static uint8_t control_write_buf[CONTROL_WRITE_BUFSIZE];
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static const struct usb_parameters *g_params;
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static void initControlWrite(const struct usb_request *rq)
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{
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memcpy(&control_write_rq, rq, sizeof(struct usb_request));
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control_write_len = 0;
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control_write_in_progress = 1;
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// printf_P(PSTR("Init cw\r\n"));
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}
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static int wcslen(const wchar_t *str)
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{
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int i=0;
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while (*str) {
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str++;
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i++;
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}
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return i;
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}
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static void setupEndpoints(void)
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{
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/*** EP0 ***/
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// Order from figure 23-2
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UENUM = 0x00; // select endpoint
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// UERST |= 0x01; // reset endpoint
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UECONX = 1<<EPEN; // activate endpoint
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UECFG0X = 0; // Control OUT
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UEIENX = (1<<RXSTPE) | (1<<RXOUTE) | (1<<NAKINE); /* | (1<<STALLEDE) | (1<<NAKOUTE) | (1<<TXINE) | (1<<RXOUTE) */;
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UECFG1X |= (1<<EPSIZE0)|(1<<EPSIZE1)|(1<<ALLOC); // 64 bytes, one bank, and allocate
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UEINTX = 0;
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if (!(UESTA0X & (1<<CFGOK))) {
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// printf_P("CFG EP0 fail\r\n");
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return;
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}
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// printf_P("ok\r\n");
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/*** EP1 ***/
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UENUM = 0x01; // select endpoint
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UECONX = 1<<EPEN; // activate endpoint
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UECFG0X = (3<<6) | (1<<EPDIR); // Interrupt IN
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UEIENX = (1<<TXINE);
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UECFG1X |= (1<<EPSIZE0)|(1<<EPSIZE1)|(1<<ALLOC); // 64 bytes, one bank, and allocate
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UEINTX = 0;
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if (!(UESTA0X & (1<<CFGOK))) {
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printf_P(PSTR("CFG EP1 fail\r\n"));
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return;
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}
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}
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// Requires UENUM already set
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static uint16_t readEP2buf(uint8_t *dst)
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{
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uint16_t len;
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int i;
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#ifdef UEBCHX
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len = UEBCLX | (UEBCHX << 8);
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#else
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len = UEBCLX;
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#endif
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for (i=0; i<len; i++) {
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*dst = UEDATX;
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dst++;
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}
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return len;
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}
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static void buf2EP(uint8_t epnum, const void *src, uint16_t len, uint16_t max_len, uint8_t progmem)
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{
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int i;
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UENUM = epnum; // select endpoint
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if (len > max_len) {
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len = max_len;
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}
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if (progmem) {
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const unsigned char *s = src;
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for (i=0; i<len; i++) {
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UEDATX = pgm_read_byte(s);
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s++;
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}
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} else {
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const unsigned char *s = src;
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for (i=0; i<len; i++) {
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UEDATX = *s;
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s++;
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}
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}
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}
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static void handleSetupPacket(struct usb_request *rq)
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{
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char unhandled = 0;
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// printf_P(PSTR("t: %02x, rq: 0x%02x, val: %04x, l: %d\r\n"), rq->bmRequestType, rq->bRequest, rq->wValue, rq->wLength);
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if (USB_RQT_IS_HOST_TO_DEVICE(rq->bmRequestType))
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{
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switch (rq->bmRequestType & USB_RQT_RECIPIENT_MASK)
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{
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case USB_RQT_RECIPIENT_DEVICE:
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switch (rq->bRequest)
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{
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case USB_RQ_SET_ADDRESS:
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UDADDR = rq->wValue;
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while (!(UEINTX & (1<<TXINI)));
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UEINTX &= ~(1<<TXINI);
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while (!(UEINTX & (1<<TXINI)));
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UDADDR |= (1<<ADDEN);
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printf_P(PSTR("Addr: %d\r\n"), rq->wValue);
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if (!rq->wValue) {
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g_device_state = STATE_DEFAULT;
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} else {
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g_device_state = STATE_ADDRESS;
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}
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break;
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case USB_RQ_SET_CONFIGURATION:
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g_current_config = rq->wValue;
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if (!g_current_config) {
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g_device_state = STATE_ADDRESS;
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} else {
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g_device_state = STATE_CONFIGURED;
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}
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while (!(UEINTX & (1<<TXINI)));
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UEINTX &= ~(1<<TXINI);
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printf_P(PSTR("Configured: %d\r\n"), g_current_config);
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break;
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default:
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unhandled = 1;
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}
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break; // USB_RQT_RECIPIENT_DEVICE
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case USB_RQT_RECIPIENT_INTERFACE:
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switch(rq->bmRequestType & (USB_RQT_TYPE_MASK))
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{
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case USB_RQT_CLASS:
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switch(rq->bRequest)
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{
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case HID_CLSRQ_SET_IDLE:
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while (!(UEINTX & (1<<TXINI)));
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UEINTX &= ~(1<<TXINI);
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break;
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case HID_CLSRQ_SET_REPORT:
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while (!(UEINTX & (1<<TXINI)));
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UEINTX &= ~(1<<TXINI);
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initControlWrite(rq);
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break;
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default:
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printf_P(PSTR("Unhandled class bRequest 0x%02x\n"), rq->bRequest);
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unhandled = 1;
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}
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break;
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default:
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unhandled = 1;
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}
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break;
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case USB_RQT_RECIPIENT_ENDPOINT:
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case USB_RQT_RECIPIENT_OTHER:
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default:
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break;
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}
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}
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// Request where we send data to the host. Handlers
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// simply load the endpoint buffer and transmission
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// is handled automatically.
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if (USB_RQT_IS_DEVICE_TO_HOST(rq->bmRequestType))
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{
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switch (rq->bmRequestType & USB_RQT_RECIPIENT_MASK)
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{
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case USB_RQT_RECIPIENT_DEVICE:
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switch (rq->bRequest)
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{
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case USB_RQ_GET_STATUS:
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{
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unsigned char status[2] = { 0x00, 0x00 };
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// status[0] & 0x01 : Self powered
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// status[1] & 0x02 : Remote wakeup
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buf2EP(0, status, 2, rq->wLength, 0);
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}
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break;
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case USB_RQ_GET_CONFIGURATION:
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{
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if (g_device_state != STATE_CONFIGURED) {
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unsigned char zero = 0;
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buf2EP(0, &zero, 1, rq->wLength, 0);
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} else {
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buf2EP(0, &g_current_config, 1, rq->wLength, 0);
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}
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}
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break;
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case USB_RQ_GET_DESCRIPTOR:
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switch (rq->wValue >> 8)
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{
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case DEVICE_DESCRIPTOR:
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buf2EP(0, (unsigned char*)g_params->devdesc,
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sizeof(struct usb_device_descriptor), rq->wLength,
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g_params->flags & USB_PARAM_FLAG_DEVDESC_PROGMEM);
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break;
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case CONFIGURATION_DESCRIPTOR:
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// Check index if more than 1 config
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buf2EP(0, (unsigned char*)g_params->configdesc, g_params->configdesc_ttllen,
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rq->wLength, g_params->flags & USB_PARAM_FLAG_CONFDESC_PROGMEM);
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break;
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case STRING_DESCRIPTOR:
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{
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int id, len, slen;
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struct usb_string_descriptor_header hdr;
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id = (rq->wValue & 0xff);
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if (id > 0 && id <= g_params->num_strings)
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{
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id -= 1; // Our string table is zero-based
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len = rq->wLength;
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slen = wcslen(g_params->strings[id]) << 1;
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hdr.bLength = sizeof(hdr) + slen;
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hdr.bDescriptorType = STRING_DESCRIPTOR;
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buf2EP(0, (unsigned char*)&hdr, 2, len, 0);
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len -= 2;
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buf2EP(0, (unsigned char*)g_params->strings[id], slen, len, 0);
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}
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else if (id == 0) // Table of supported languages (string id 0)
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{
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unsigned char languages[4] = {
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4, STRING_DESCRIPTOR, 0x09, 0x10 // English (Canadian)
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};
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buf2EP(0, languages, 4, rq->wLength, 0);
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}
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else
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{
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printf_P(PSTR("Unknown string id\r\n"));
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}
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}
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break;
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case DEVICE_QUALIFIER_DESCRIPTOR:
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// Full speed devices must respond with a request error.
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unhandled = 1;
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break;
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default:
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// printf_P(PSTR("Unhandled descriptor 0x%02x\n"), rq->wValue>>8);
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unhandled = 1;
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}
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break;
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default:
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unhandled = 1;
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}
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break;
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case USB_RQT_RECIPIENT_INTERFACE:
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switch(rq->bmRequestType & (USB_RQT_TYPE_MASK))
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{
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case USB_RQT_STANDARD:
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switch (rq->bRequest)
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{
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case USB_RQ_GET_STATUS:
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{ // 9.4.5 Get Status, Figure 9-5. Reserved (0)
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unsigned char status[2] = { 0x00, 0x00 };
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buf2EP(0, status, 2, rq->wLength, 0);
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}
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break;
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case USB_RQ_GET_DESCRIPTOR:
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switch (rq->wValue >> 8)
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{
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case REPORT_DESCRIPTOR:
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{
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uint16_t rqlen = rq->wLength;
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uint16_t todo = rqlen;
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uint16_t pos = 0;
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unsigned char *reportdesc;
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// HID 1.1 : 7.1.1 Get_Descriptor request. wIndex is the interface number.
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//
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if (rq->wIndex > g_params->n_hid_interfaces)
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break;
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reportdesc = (unsigned char*)g_params->hid_params[rq->wIndex].reportdesc;
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if (rqlen > g_params->hid_params[rq->wIndex].reportdesc_len) {
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// rqlen = g_params->hid_params[rq->wIndex].reportdesc_len;
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};
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// printf_P(PSTR("t: %02x, rq: 0x%02x, val: %04x, l: %d\r\n"), rq->bmRequestType, rq->bRequest, rq->wValue, rq->wLength);
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while(1)
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{
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// printf_P(PSTR("pos %d todo %d\r\n"), pos, todo);
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if (todo > 64) {
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buf2EP(0, reportdesc+pos, 64,
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64,
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g_params->flags & USB_PARAM_FLAG_REPORTDESC_PROGMEM);
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UEINTX &= ~(1<<TXINI);
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pos += 64;
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todo -= 64;
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while (!(UEINTX & (1<<TXINI)));
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} else {
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buf2EP(0, reportdesc+pos, todo,
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todo,
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g_params->flags & USB_PARAM_FLAG_REPORTDESC_PROGMEM);
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UEINTX &= ~(1<<TXINI);
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while (!(UEINTX & (1<<TXINI)));
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break;
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}
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}
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while (1)
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{
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if (UEINTX & (1<<RXOUTI)) {
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UEINTX &= ~(1<<RXOUTI); // ACK
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return;
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}
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}
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}
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break;
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default:
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unhandled = 1;
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}
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break;
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default:
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unhandled = 1;
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}
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break;
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case USB_RQT_CLASS:
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switch (rq->bRequest)
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{
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case HID_CLSRQ_GET_REPORT:
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{
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// HID 1.1 : 7.2.1 Get_Report request. wIndex is the interface number.
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if (rq->wIndex > g_params->n_hid_interfaces)
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break;
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if (g_params->hid_params[rq->wIndex].getReport) {
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const unsigned char *data;
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uint16_t len;
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len = g_params->hid_params[rq->wIndex].getReport(rq, &data);
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if (len) {
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buf2EP(0, data, len, rq->wLength, 0);
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}
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} else {
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// Treat as not-supported (i.e. STALL endpoint)
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unhandled = 1;
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}
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}
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break;
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default:
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unhandled = 1;
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}
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break;
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default:
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unhandled = 1;
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}
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break;
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case USB_RQT_RECIPIENT_ENDPOINT:
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switch (rq->bRequest)
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{
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case USB_RQ_GET_STATUS:
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{ // 9.4.5 Get Status, Figure 0-6
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unsigned char status[2] = { 0x00, 0x00 };
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// status[0] & 0x01 : Halt
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buf2EP(0, status, 2, rq->wLength, 0);
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}
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break;
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default:
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unhandled = 1;
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}
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break;
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case USB_RQT_RECIPIENT_OTHER:
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default:
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unhandled = 1;
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}
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if (!unhandled)
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{
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// Handle transmission now
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UEINTX &= ~(1<<TXINI);
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while (1)
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{
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if (UEINTX & (1<<TXINI)) {
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UEINTX &= ~(1<<TXINI);
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}
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if (UEINTX & (1<<RXOUTI)) {
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break;
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}
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}
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UEINTX &= ~(1<<RXOUTI); // ACK
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}
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} // IS DEVICE-TO-HOST
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if (unhandled) {
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// printf_P(PSTR("t: %02x, rq: 0x%02x, val: %04x\r\n"), rq->bmRequestType, rq->bRequest, rq->wValue);
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UECONX |= (1<<STALLRQ);
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}
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}
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static void handleDataPacket(const struct usb_request *rq, uint8_t *dat, uint16_t len)
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{
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uint16_t i;
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if ((rq->bmRequestType & (USB_RQT_TYPE_MASK)) == USB_RQT_CLASS) {
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// TODO : Cechk for HID_CLSRQ_SET_REPORT in rq->bRequest
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// HID 1.1 : 7.2.2 Set_Report request. wIndex is the interface number.
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if (rq->wIndex > g_params->n_hid_interfaces)
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return;
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if (g_params->hid_params[rq->wIndex].setReport) {
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if (g_params->hid_params[rq->wIndex].setReport(rq, dat, len)) {
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UECONX |= (1<<STALLRQ);
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} else {
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// xmit status
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UEINTX &= ~(1<<TXINI);
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}
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return;
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}
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}
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printf_P(PSTR("Unhandled control write [%d] : "), len);
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for (i=0; i<len; i++) {
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printf_P(PSTR("%02X "), dat[i]);
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}
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printf_P(PSTR("\r\n"));
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}
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// Device interrupt
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ISR(USB_GEN_vect)
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{
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uint8_t i;
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i = UDINT;
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if (i & (1<<SUSPI)) {
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UDINT &= ~(1<<SUSPI);
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g_usb_suspend = 1;
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UDIEN |= (1<<WAKEUPE);
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// printf_P(PSTR("SUSPI\r\n"));
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// CPU could now be put in low power mode. Later,
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// WAKEUPI would wake it up.
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}
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// this interrupt is to wakeup the cpu from sleep mode.
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if (i & (1<<WAKEUPI)) {
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UDINT &= ~(1<<WAKEUPE);
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if (g_usb_suspend) {
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g_usb_suspend = 0;
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// printf_P(PSTR("WAKEUPI\r\n"));
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UDIEN &= ~(1<<WAKEUPE); // woke up. Not needed anymore.
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}
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}
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if (i & (1<<EORSTI)) {
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// printf_P(PSTR("EORSTI\r\n"));
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g_usb_suspend = 0;
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setupEndpoints();
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UDINT &= ~(1<<EORSTI);
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}
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if (i & (1<<SOFI)) {
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UDINT &= ~(1<<SOFI);
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// printf_P(PSTR("SOFI\r\n"));
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}
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if (i & (1<<EORSMI)) {
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UDINT &= ~(1<<EORSMI);
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// printf_P(PSTR("EORSMI\r\n"));
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}
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if (i & (1<<UPRSMI)) {
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UDINT &= ~(1<<UPRSMI);
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printf_P(PSTR("UPRSMI\r\n"));
|
|
}
|
|
}
|
|
|
|
|
|
|
|
// Endpoint interrupt
|
|
ISR(USB_COM_vect)
|
|
{
|
|
uint8_t ueint;
|
|
uint8_t i;
|
|
|
|
ueint = UEINT;
|
|
|
|
if (ueint & (1<<EPINT0)) {
|
|
UENUM = 0;
|
|
i = UEINTX;
|
|
|
|
if (i & (1<<RXSTPI)) {
|
|
// printf_P(PSTR("RXSTPI\r\n"));
|
|
readEP2buf(g_ep0_buf);
|
|
UEINTX &= ~(1<<RXSTPI);
|
|
handleSetupPacket((struct usb_request *)g_ep0_buf);
|
|
}
|
|
|
|
if (i & (1<<RXOUTI)) {
|
|
uint16_t len;
|
|
len = readEP2buf(g_ep0_buf);
|
|
UEINTX &= ~(1<<RXOUTI);
|
|
if (control_write_in_progress) {
|
|
// printf_P(PSTR("chunk: %d\r\n"), len);
|
|
if (control_write_len + len < CONTROL_WRITE_BUFSIZE) {
|
|
memcpy(control_write_buf + control_write_len, g_ep0_buf, len);
|
|
control_write_len += len;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (i & (1<<NAKINI)) {
|
|
UEINTX &= ~(1<<NAKINI);
|
|
if (control_write_in_progress) {
|
|
// printf_P(PSTR("end. total: %d\n"), control_write_len);
|
|
handleDataPacket(&control_write_rq, control_write_buf, control_write_len);
|
|
control_write_in_progress = 0;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (ueint & (1<<EPINT1)) {
|
|
UENUM = 1;
|
|
i = UEINTX;
|
|
|
|
if (i & (1<<TXINI)) {
|
|
if (interrupt_data_len < 0) {
|
|
// If there's not already data waiting to be
|
|
// sent, disable the interrupt.
|
|
UEIENX &= ~(1<<TXINE);
|
|
} else {
|
|
UEINTX &= ~(1<<TXINI);
|
|
buf2EP(1, interrupt_data, interrupt_data_len, interrupt_data_len, 0);
|
|
interrupt_data = NULL;
|
|
interrupt_data_len = -1;
|
|
UEINTX &= ~(1<<FIFOCON);
|
|
}
|
|
}
|
|
}
|
|
|
|
#if 0
|
|
if (i & (1<<RXOUTI)) {
|
|
UEINTX &= ~(1<<RXOUTI);
|
|
printf_P(PSTR("RXOUTI\r\n"));
|
|
}
|
|
#endif
|
|
}
|
|
|
|
char usb_interruptReady(void)
|
|
{
|
|
return interrupt_data_len == -1;
|
|
}
|
|
|
|
void usb_interruptSend(void *data, int len)
|
|
{
|
|
uint8_t sreg = SREG;
|
|
|
|
while (interrupt_data_len != -1) { }
|
|
|
|
cli();
|
|
|
|
interrupt_data = data;
|
|
interrupt_data_len = len;
|
|
|
|
UENUM = 1;
|
|
UEIENX |= (1<<TXINE);
|
|
|
|
SREG = sreg;
|
|
}
|
|
|
|
void usb_shutdown(void)
|
|
{
|
|
UDCON |= (1<<DETACH);
|
|
|
|
// Disable interrupts
|
|
UDIEN = 0;
|
|
|
|
|
|
USBCON &= ~(1<<USBE);
|
|
USBCON |= (1<<FRZCLK); // initial value
|
|
#ifdef UHWCON
|
|
UHWCON &= ~(1<<UVREGE); // Disable USB pad regulator
|
|
#endif
|
|
}
|
|
|
|
#define STATE_WAIT_VBUS 0
|
|
#define STATE_ATTACHED 1
|
|
static unsigned char usb_state;
|
|
|
|
void usb_doTasks(void)
|
|
{
|
|
switch (usb_state)
|
|
{
|
|
default:
|
|
usb_state = STATE_WAIT_VBUS;
|
|
case STATE_WAIT_VBUS:
|
|
#ifdef USBSTA
|
|
if (USBSTA & (1<<VBUS)) {
|
|
#endif
|
|
printf_P(PSTR("ATTACH\r\n"));
|
|
UDCON &= ~(1<<DETACH); // clear DETACH bit
|
|
usb_state = STATE_ATTACHED;
|
|
#ifdef USBSTA
|
|
}
|
|
#endif
|
|
break;
|
|
case STATE_ATTACHED:
|
|
break;
|
|
}
|
|
}
|
|
|
|
#if defined(__AVR_ATmega32U2__)
|
|
|
|
/* Atmega32u2 datasheet 8.11.6, PLLCSR.
|
|
* But register summary says PLLP0... */
|
|
#ifndef PINDIV
|
|
#define PINDIV 2
|
|
#endif
|
|
static void pll_init(void)
|
|
{
|
|
#if F_CPU==8000000L
|
|
PLLCSR = 0;
|
|
#elif F_CPU==16000000L
|
|
PLLCSR = (1<<PINDIV);
|
|
#else
|
|
#error Unsupported clock frequency
|
|
#endif
|
|
PLLCSR |= (1<<PLLE);
|
|
while (!(PLLCSR&(1<<PLOCK))) {
|
|
// wait for PLL lock
|
|
}
|
|
}
|
|
#else
|
|
static void pll_init(void)
|
|
{
|
|
#if F_CPU==8000000L
|
|
// The PLL generates a clock that is 24x a nominal 2MHz input.
|
|
// Hence, we need to divide by 4 the external 8MHz crystal
|
|
// frequency.
|
|
PLLCSR = (1<<PLLP1)|(1<<PLLP0);
|
|
#elif F_CPU==16000000L
|
|
// The PLL generates a clock that is 24x a nominal 2MHz input.
|
|
// Hence, we need to divide by 8 the external 16MHz crystal
|
|
// frequency.
|
|
PLLCSR = (1<<PLLP2)|(1<<PLLP0);
|
|
#else
|
|
#error Unsupported clock frequency
|
|
#endif
|
|
|
|
PLLCSR |= (1<<PLLE);
|
|
while (!(PLLCSR&(1<<PLOCK))) {
|
|
// wait for PLL lock
|
|
}
|
|
}
|
|
#endif
|
|
|
|
void usb_init(const struct usb_parameters *params)
|
|
{
|
|
// Initialize the registers to the default values
|
|
// from the datasheet. The bootloader that sometimes
|
|
// runs before we get here (when doing updates) leaves
|
|
// different values...
|
|
#ifdef UHWCON
|
|
UHWCON = 0x80;
|
|
#endif
|
|
USBCON = 0x20;
|
|
UDCON = 0x01;
|
|
UDIEN = 0x00;
|
|
UDADDR = 0x00;
|
|
|
|
g_params = params;
|
|
|
|
// Set some initial values
|
|
USBCON &= ~(1<<USBE);
|
|
USBCON |= (1<<FRZCLK); // initial value
|
|
#ifdef UHWCON
|
|
UHWCON |= (1<<UVREGE); // Enable USB pad regulator
|
|
UHWCON &= ~(1<<UIDE);
|
|
UHWCON |= (1<UIMOD);
|
|
#endif
|
|
|
|
#ifdef UPOE
|
|
UPOE = 0; // Disable direct drive of USB pins
|
|
#endif
|
|
#ifdef REGCR
|
|
REGCR = 0; // Enable the regulator
|
|
#endif
|
|
|
|
pll_init();
|
|
|
|
USBCON |= (1<<USBE);
|
|
USBCON &= ~(1<<FRZCLK); // Unfreeze clock
|
|
#ifdef OTGPADE
|
|
USBCON |= (1<<OTGPADE);
|
|
#endif
|
|
|
|
#ifdef LSM
|
|
// Select full speed mode
|
|
UDCON &= (1<<LSM);
|
|
#endif
|
|
|
|
setupEndpoints();
|
|
|
|
UDINT &= ~(1<<SUSPI);
|
|
UDIEN = (1<<SUSPE) | (1<<EORSTE) |/* (1<<SOFE) |*/ (1<<WAKEUPE) | (1<<EORSME) | (1<<UPRSME);
|
|
}
|
|
|
|
|