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Andrea Ottaviani 2024-08-07 20:46:32 +02:00 committed by GitHub
parent 11c324e398
commit f4bd0c47fc
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GPG Key ID: B5690EEEBB952194
40 changed files with 123686 additions and 0 deletions

413
Kicad/PicoPAC.dsn Normal file
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@ -0,0 +1,413 @@
(pcb "C:\Users\Andrea\Documents\Retrocomputer\Philips Videopac\PicoPAC\Kicad\PicoPAC.dsn"
(parser
(string_quote ")
(space_in_quoted_tokens on)
(host_cad "KiCad's Pcbnew")
(host_version "8.0.3")
)
(resolution um 10)
(unit um)
(structure
(layer F.Cu
(type signal)
(property
(index 0)
)
)
(layer B.Cu
(type signal)
(property
(index 1)
)
)
(boundary
(path pcb 0 85500 -100000 84000 -100000 84000 -107500 85500 -107500
85500 -135500 83500 -138000 24500 -138000 22500 -135500 22500 -105500
24000 -105500 24000 -98000 22500 -98000 22500 -53000 85500 -53000
85500 -100000)
)
(via "Via[0-1]_800:400_um")
(rule
(width 250)
(clearance 200)
(clearance 200 (type default_smd))
(clearance 50 (type smd_smd))
)
)
(placement
(component Connector_PinSocket_2.54mm:PinSocket_1x20_P2.54mm_Vertical
(place J3 61100.000000 -56120.000000 front 0.000000 (PN Conn_01x20))
(place J2 43300.000000 -56125.000000 front 0.000000 (PN Conn_01x20))
)
(component Button_Switch_THT:SW_PUSH_6mm
(place SW1 72275.000000 -58525.000000 front 0.000000 (PN SW_Push))
)
(component "Diode_THT:D_DO-35_SOD27_P7.62mm_Horizontal"
(place D1 32015.000000 -99375.000000 front 90.000000 (PN "Diode "))
)
(component "videopac-usbcart-kicad5:videopac-edgecon"
(place J1 54000.000000 -138000.000000 front 0.000000 (PN "Videopac-edgeconnector"))
)
)
(library
(image Connector_PinSocket_2.54mm:PinSocket_1x20_P2.54mm_Vertical
(outline (path signal 120 -1330 -1270 -1330 -49590))
(outline (path signal 120 -1330 -1270 1330 -1270))
(outline (path signal 120 -1330 -49590 1330 -49590))
(outline (path signal 120 0 1330 1330 1330))
(outline (path signal 120 1330 1330 1330 0))
(outline (path signal 120 1330 -1270 1330 -49590))
(outline (path signal 50 -1800 1800 1750 1800))
(outline (path signal 50 -1800 -50000 -1800 1800))
(outline (path signal 50 1750 1800 1750 -50000))
(outline (path signal 50 1750 -50000 -1800 -50000))
(outline (path signal 100 -1270 1270 635 1270))
(outline (path signal 100 -1270 -49530 -1270 1270))
(outline (path signal 100 635 1270 1270 635))
(outline (path signal 100 1270 635 1270 -49530))
(outline (path signal 100 1270 -49530 -1270 -49530))
(pin Rect[A]Pad_1700x1700_um 1 0 0)
(pin Oval[A]Pad_1700x1700_um 2 0 -2540)
(pin Oval[A]Pad_1700x1700_um 3 0 -5080)
(pin Oval[A]Pad_1700x1700_um 4 0 -7620)
(pin Oval[A]Pad_1700x1700_um 5 0 -10160)
(pin Oval[A]Pad_1700x1700_um 6 0 -12700)
(pin Oval[A]Pad_1700x1700_um 7 0 -15240)
(pin Oval[A]Pad_1700x1700_um 8 0 -17780)
(pin Oval[A]Pad_1700x1700_um 9 0 -20320)
(pin Oval[A]Pad_1700x1700_um 10 0 -22860)
(pin Oval[A]Pad_1700x1700_um 11 0 -25400)
(pin Oval[A]Pad_1700x1700_um 12 0 -27940)
(pin Oval[A]Pad_1700x1700_um 13 0 -30480)
(pin Oval[A]Pad_1700x1700_um 14 0 -33020)
(pin Oval[A]Pad_1700x1700_um 15 0 -35560)
(pin Oval[A]Pad_1700x1700_um 16 0 -38100)
(pin Oval[A]Pad_1700x1700_um 17 0 -40640)
(pin Oval[A]Pad_1700x1700_um 18 0 -43180)
(pin Oval[A]Pad_1700x1700_um 19 0 -45720)
(pin Oval[A]Pad_1700x1700_um 20 0 -48260)
)
(image Button_Switch_THT:SW_PUSH_6mm
(outline (path signal 120 -250 -1500 -250 -3000))
(outline (path signal 120 1000 -5500 5500 -5500))
(outline (path signal 120 5500 1000 1000 1000))
(outline (path signal 120 6750 -3000 6750 -1500))
(outline (path signal 50 -1500 1500 -1250 1500))
(outline (path signal 50 -1500 1250 -1500 1500))
(outline (path signal 50 -1500 -5750 -1500 1250))
(outline (path signal 50 -1500 -5750 -1500 -6000))
(outline (path signal 50 -1500 -6000 -1250 -6000))
(outline (path signal 50 -1250 1500 7750 1500))
(outline (path signal 50 7750 1500 8000 1500))
(outline (path signal 50 7750 -6000 -1250 -6000))
(outline (path signal 50 7750 -6000 8000 -6000))
(outline (path signal 50 8000 1500 8000 1250))
(outline (path signal 50 8000 1250 8000 -5750))
(outline (path signal 50 8000 -6000 8000 -5750))
(outline (path signal 100 250 750 3250 750))
(outline (path signal 100 250 -5250 250 750))
(outline (path signal 100 3250 750 6250 750))
(outline (path signal 100 6250 750 6250 -5250))
(outline (path signal 100 6250 -5250 250 -5250))
(outline (path signal 100 5265.56 -2250 5246.79 -2524.45 5190.82 -2793.79 5098.7 -3053
4972.14 -3297.26 4813.5 -3522 4625.73 -3723.05 4412.34 -3896.66
4177.29 -4039.59 3924.97 -4149.19 3660.08 -4223.41 3387.55 -4260.86
3112.45 -4260.86 2839.92 -4223.41 2575.03 -4149.19 2322.71 -4039.59
2087.66 -3896.66 1874.27 -3723.05 1686.5 -3522 1527.86 -3297.26
1401.3 -3053 1309.18 -2793.79 1253.21 -2524.45 1234.44 -2250
1253.21 -1975.55 1309.18 -1706.21 1401.3 -1447 1527.86 -1202.74
1686.5 -978.002 1874.27 -776.953 2087.66 -603.345 2322.71 -460.411
2575.03 -350.813 2839.92 -276.593 3112.45 -239.135 3387.55 -239.135
3660.08 -276.593 3924.97 -350.813 4177.29 -460.411 4412.34 -603.345
4625.73 -776.953 4813.5 -978.002 4972.14 -1202.74 5098.7 -1447
5190.82 -1706.21 5246.79 -1975.55 5265.56 -2250))
(pin Round[A]Pad_2000_um (rotate 90) 1 0 0)
(pin Round[A]Pad_2000_um (rotate 90) 1@1 6500 0)
(pin Round[A]Pad_2000_um (rotate 90) 2 0 -4500)
(pin Round[A]Pad_2000_um (rotate 90) 2@1 6500 -4500)
)
(image "Diode_THT:D_DO-35_SOD27_P7.62mm_Horizontal"
(outline (path signal 120 1040 0 1690 0))
(outline (path signal 120 1690 1120 1690 -1120))
(outline (path signal 120 1690 -1120 5930 -1120))
(outline (path signal 120 2290 1120 2290 -1120))
(outline (path signal 120 2410 1120 2410 -1120))
(outline (path signal 120 2530 1120 2530 -1120))
(outline (path signal 120 5930 1120 1690 1120))
(outline (path signal 120 5930 -1120 5930 1120))
(outline (path signal 120 6580 0 5930 0))
(outline (path signal 50 -1050 1250 -1050 -1250))
(outline (path signal 50 -1050 -1250 8670 -1250))
(outline (path signal 50 8670 1250 -1050 1250))
(outline (path signal 50 8670 -1250 8670 1250))
(outline (path signal 100 0 0 1810 0))
(outline (path signal 100 1810 1000 1810 -1000))
(outline (path signal 100 1810 -1000 5810 -1000))
(outline (path signal 100 2310 1000 2310 -1000))
(outline (path signal 100 2410 1000 2410 -1000))
(outline (path signal 100 2510 1000 2510 -1000))
(outline (path signal 100 5810 1000 1810 1000))
(outline (path signal 100 5810 -1000 5810 1000))
(outline (path signal 100 7620 0 5810 0))
(pin Rect[A]Pad_1600x1600_um 1 0 0)
(pin Oval[A]Pad_1600x1600_um 2 7620 0)
)
(image "videopac-usbcart-kicad5:videopac-edgecon"
(outline (path signal 120 -31500 32500 -30000 32500))
(outline (path signal 120 -31500 2500 -31500 85000))
(outline (path signal 120 -30000 40000 -31500 40000))
(outline (path signal 120 -30000 32500 -30000 40000))
(outline (path signal 120 -29500 0 -31500 2500))
(outline (path signal 120 -29500 0 29500 0))
(outline (path signal 1120 -27000 31000 -27000 40000))
(outline (path signal 1000 -4000 16000 4000 16000))
(outline (path signal 1120 27000 31000 27000 40000))
(outline (path signal 120 29500 0 31500 2500))
(outline (path signal 120 30000 38000 30000 30500))
(outline (path signal 120 30000 38000 31500 38000))
(outline (path signal 120 30000 30500 31500 30500))
(outline (path signal 120 31500 2500 31500 85000))
(outline (path signal 120 -23500 25000 -23519.2 24634.2 -23576.5 24272.3 -23671.3 23918.4
-23802.6 23576.4 -23968.9 23250 -24168.4 22942.8 -24399 22658
-24658 22399 -24942.8 22168.4 -25250 21968.9 -25576.4 21802.6
-25918.4 21671.3 -26272.3 21576.5 -26634.2 21519.2 -27000 21500
-27365.8 21519.2 -27727.7 21576.5 -28081.6 21671.3 -28423.6 21802.6
-28750 21968.9 -29057.2 22168.4 -29342 22399 -29601 22658
-29831.6 22942.8 -30031.1 23250 -30197.4 23576.4 -30328.7 23918.4
-30423.5 24272.3 -30480.8 24634.2 -30500 25000 -30480.8 25365.8
-30423.5 25727.7 -30328.7 26081.6 -30197.4 26423.6 -30031.1 26750
-29831.6 27057.2 -29601 27342 -29342 27601 -29057.2 27831.6
-28750 28031.1 -28423.6 28197.4 -28081.6 28328.7 -27727.7 28423.5
-27365.8 28480.8 -27000 28500 -26634.2 28480.8 -26272.3 28423.5
-25918.4 28328.7 -25576.4 28197.4 -25250 28031.1 -24942.8 27831.6
-24658 27601 -24399 27342 -24168.4 27057.2 -23968.9 26750
-23802.6 26423.6 -23671.3 26081.6 -23576.5 25727.7 -23519.2 25365.8
-23500 25000))
(outline (path signal 120 30500 25000 30480.8 24634.2 30423.5 24272.3 30328.7 23918.4
30197.4 23576.4 30031.1 23250 29831.6 22942.8 29601 22658
29342 22399 29057.2 22168.4 28750 21968.9 28423.6 21802.6
28081.6 21671.3 27727.7 21576.5 27365.8 21519.2 27000 21500
26634.2 21519.2 26272.3 21576.5 25918.4 21671.3 25576.4 21802.6
25250 21968.9 24942.8 22168.4 24658 22399 24399 22658 24168.4 22942.8
23968.9 23250 23802.6 23576.4 23671.3 23918.4 23576.5 24272.3
23519.2 24634.2 23500 25000 23519.2 25365.8 23576.5 25727.7
23671.3 26081.6 23802.6 26423.6 23968.9 26750 24168.4 27057.2
24399 27342 24658 27601 24942.8 27831.6 25250 28031.1 25576.4 28197.4
25918.4 28328.7 26272.3 28423.5 26634.2 28480.8 27000 28500
27365.8 28480.8 27727.7 28423.5 28081.6 28328.7 28423.6 28197.4
28750 28031.1 29057.2 27831.6 29342 27601 29601 27342 29831.6 27057.2
30031.1 26750 30197.4 26423.6 30328.7 26081.6 30423.5 25727.7
30480.8 25365.8 30500 25000))
(pin Rect[T]Pad_2000x8000_um 1 -27500 4000)
(pin Rect[T]Pad_2000x8000_um 2 -23571 4000)
(pin Rect[T]Pad_2000x8000_um 3 -19643 4000)
(pin Rect[T]Pad_2000x8000_um 4 -15714 4000)
(pin Rect[T]Pad_2000x8000_um 5 -11786 4000)
(pin Rect[T]Pad_2000x8000_um 6 -7857 4000)
(pin Rect[T]Pad_2000x8000_um 7 -3929 4000)
(pin Rect[T]Pad_2000x8000_um 8 0 4000)
(pin Rect[T]Pad_2000x8000_um 9 3929 4000)
(pin Rect[T]Pad_2000x8000_um 10 7857 4000)
(pin Rect[T]Pad_2000x8000_um 11 11786 4000)
(pin Rect[T]Pad_2000x8000_um 12 15714 4000)
(pin Rect[T]Pad_2000x8000_um 13 19643 4000)
(pin Rect[T]Pad_2000x8000_um 14 23571 4000)
(pin Rect[T]Pad_2000x8000_um 15 27500 4000)
(pin Rect[B]Pad_2000x8000_um A -27500 4000)
(pin Rect[B]Pad_2000x8000_um B -23571 4000)
(pin Rect[B]Pad_2000x8000_um C -19643 4000)
(pin Rect[B]Pad_2000x8000_um D -15714 4000)
(pin Rect[B]Pad_2000x8000_um E -11786 4000)
(pin Rect[B]Pad_2000x8000_um F -7857 4000)
(pin Rect[B]Pad_2000x8000_um G -3929 4000)
(pin Rect[B]Pad_2000x8000_um H 0 4000)
(pin Rect[B]Pad_2000x8000_um J 3929 4000)
(pin Rect[B]Pad_2000x8000_um K 7857 4000)
(pin Rect[B]Pad_2000x8000_um L 11786 4000)
(pin Rect[B]Pad_2000x8000_um M 15714 4000)
(pin Rect[B]Pad_2000x8000_um N 19643 4000)
(pin Rect[B]Pad_2000x8000_um P 23571 4000)
(pin Rect[B]Pad_2000x8000_um R 27500 4000)
(keepout "" (circle F.Cu 5500 -27000 25000))
(keepout "" (circle B.Cu 5500 -27000 25000))
(keepout "" (circle F.Cu 5500 27000 25000))
(keepout "" (circle B.Cu 5500 27000 25000))
)
(padstack Round[A]Pad_2000_um
(shape (circle F.Cu 2000))
(shape (circle B.Cu 2000))
(attach off)
)
(padstack Oval[A]Pad_1600x1600_um
(shape (path F.Cu 1600 0 0 0 0))
(shape (path B.Cu 1600 0 0 0 0))
(attach off)
)
(padstack Oval[A]Pad_1700x1700_um
(shape (path F.Cu 1700 0 0 0 0))
(shape (path B.Cu 1700 0 0 0 0))
(attach off)
)
(padstack Rect[B]Pad_2000x8000_um
(shape (rect B.Cu -1000 -4000 1000 4000))
(attach off)
)
(padstack Rect[T]Pad_2000x8000_um
(shape (rect F.Cu -1000 -4000 1000 4000))
(attach off)
)
(padstack Rect[A]Pad_1600x1600_um
(shape (rect F.Cu -800 -800 800 800))
(shape (rect B.Cu -800 -800 800 800))
(attach off)
)
(padstack Rect[A]Pad_1700x1700_um
(shape (rect F.Cu -850 -850 850 850))
(shape (rect B.Cu -850 -850 850 850))
(attach off)
)
(padstack "Via[0-1]_800:400_um"
(shape (circle F.Cu 800))
(shape (circle B.Cu 800))
(attach off)
)
)
(network
(net +5V
(pins D1-2 J1-D)
)
(net GND
(pins J3-3 J3-6 J3-12 J2-6 J2-15 SW1-2 SW1-2@1 J1-B J1-C)
)
(net "Net-(D1-K)"
(pins J3-2 D1-1)
)
(net A10
(pins J2-12 J1-10)
)
(net A0
(pins J2-1 J1-G)
)
(net A5
(pins J2-7 J1-M)
)
(net D3
(pins J2-20 J1-5)
)
(net A2
(pins J2-3 J1-J)
)
(net D7
(pins J3-17 J1-9)
)
(net A11
(pins J2-13 J1-14)
)
(net "~{CS}"
(pins J3-11 J1-E)
)
(net D2
(pins J2-19 J1-4)
)
(net A1
(pins J2-2 J1-H)
)
(net A7
(pins J2-9 J1-N)
)
(net A6
(pins J2-8 J1-P)
)
(net A4
(pins J2-5 J1-L)
)
(net "~{PSEN}"
(pins J3-16 J1-F)
)
(net A12
(pins J2-14 J1-12)
)
(net D5
(pins J3-19 J1-7)
)
(net D0
(pins J2-17 J1-2)
)
(net A8
(pins J2-10 J1-R)
)
(net A13
(pins J2-16 J1-13)
)
(net D1
(pins J2-18 J1-3)
)
(net A3
(pins J2-4 J1-K)
)
(net "~{WR}"
(pins J3-15 J1-A)
)
(net A9
(pins J2-11 J1-15)
)
(net D6
(pins J3-18 J1-8)
)
(net CS
(pins J3-14 J1-11)
)
(net T0
(pins J3-10 J1-1)
)
(net D4
(pins J3-20 J1-6)
)
(net RST
(pins J3-7 SW1-1 SW1-1@1)
)
(net "unconnected-(J3-Pin_9-Pad9)"
(pins J3-9)
)
(net "unconnected-(J3-Pin_1-Pad1)"
(pins J3-1)
)
(net "unconnected-(J3-Pin_8-Pad8)"
(pins J3-8)
)
(net "unconnected-(J3-Pin_13-Pad13)"
(pins J3-13)
)
(net "unconnected-(J3-Pin_5-Pad5)"
(pins J3-5)
)
(net "unconnected-(J3-Pin_4-Pad4)"
(pins J3-4)
)
(class kicad_default "" +5V A0 A1 A10 A11 A12 A13 A2 A3 A4 A5 A6 A7 A8
A9 CS D0 D1 D2 D3 D4 D5 D6 D7 GND "Net-(D1-K)" RST T0 "unconnected-(J3-Pin_1-Pad1)"
"unconnected-(J3-Pin_13-Pad13)" "unconnected-(J3-Pin_4-Pad4)" "unconnected-(J3-Pin_5-Pad5)"
"unconnected-(J3-Pin_8-Pad8)" "unconnected-(J3-Pin_9-Pad9)" "~{CS}"
"~{PSEN}" "~{WR}"
(circuit
(use_via Via[0-1]_800:400_um)
)
(rule
(width 250)
(clearance 200)
)
)
)
(wiring
(wire (path B.Cu 1000 34400 -134000 34400 -131250)(net GND)(type route))
(wire (path F.Cu 250 54000 -134000 54000 -131000)(net D6)(type route))
(wire (path F.Cu 250 57920 -131250 57920 -134000)(net D7)(type route))
(wire (path F.Cu 250 69680 -131250 69680 -134000)(net A12)(type route))
(wire (path F.Cu 250 73600 -134000 73600 -131250)(net A13)(type route))
(wire (path B.Cu 250 46143 -134000 46143 -131000)(net "~{PSEN}")(type route))
(wire (path B.Cu 250 50071 -134000 50071 -131000)(net A0)(type route))
(wire (path B.Cu 250 54000 -134000 54000 -131000)(net A1)(type route))
(wire (path F.Cu 250 77520 -134000 77520 -131250)(net A11)(type route))
(wire (path B.Cu 1000 38320 -134000 38320 -131250)(net +5V)(type route))
)
)

5459
Kicad/PicoPAC.kicad_pcb Normal file

File diff suppressed because it is too large Load Diff

86
Kicad/PicoPAC.kicad_prl Normal file
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@ -0,0 +1,86 @@
{
"board": {
"active_layer": 44,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_netclasses": [],
"hidden_nets": [],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
"images": 0.6,
"pads": 1.0,
"tracks": 1.0,
"vias": 1.0,
"zones": 0.6
},
"selection_filter": {
"dimensions": true,
"footprints": true,
"graphics": true,
"keepouts": true,
"lockedItems": false,
"otherItems": true,
"pads": true,
"text": true,
"tracks": true,
"vias": true,
"zones": true
},
"visible_items": [
0,
1,
2,
3,
4,
5,
6,
7,
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
32,
33,
34,
35,
36,
39,
40
],
"visible_layers": "fffffff_ffffffff",
"zone_display_mode": 0
},
"git": {
"repo_password": "",
"repo_type": "",
"repo_username": "",
"ssh_key": ""
},
"meta": {
"filename": "PicoPAC.kicad_prl",
"version": 3
},
"project": {
"files": []
}
}

873
Kicad/PicoPAC.kicad_pro Normal file
View File

@ -0,0 +1,873 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"apply_defaults_to_fp_fields": false,
"apply_defaults_to_fp_shapes": false,
"apply_defaults_to_fp_text": false,
"board_outline_line_width": 0.05,
"copper_line_width": 0.2,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.05,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.1,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.1,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.0,
"height": 0.55,
"width": 1.5
},
"silk_line_width": 0.12,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"min_clearance": 0.3
}
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"meta": {
"filename": "board_design_settings.json",
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_symbol_mismatch": "warning",
"footprint_type_mismatch": "ignore",
"hole_clearance": "ignore",
"hole_near_hole": "error",
"holes_co_located": "warning",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "warning",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": true,
"rule_severitieslegacy_no_courtyard_defined": false,
"rules": {
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.025,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.2,
"min_microvia_drill": 0.1,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.8,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.2,
"min_via_annular_width": 0.1,
"min_via_diameter": 0.4,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
},
"teardrop_options": [
{
"td_onpadsmd": true,
"td_onroundshapesonly": false,
"td_ontrackend": false,
"td_onviapad": true
}
],
"teardrop_parameters": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [
0.0,
0.5,
1.0,
2.0
],
"tuning_pattern_settings": {
"diff_pair_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 1.0
},
"diff_pair_skew_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
},
"single_track_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
}
},
"via_dimensions": [],
"zones_allow_external_fillets": false
},
"ipc2581": {
"dist": "",
"distpn": "",
"internal_id": "",
"mfg": "",
"mpn": ""
},
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
0,
0,
0,
0,
0,
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0,
1,
0,
1,
2
],
[
0,
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0,
0,
0,
0,
1,
1,
2,
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1,
2
],
[
0,
0,
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0,
0,
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0,
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],
[
0,
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],
[
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1,
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1,
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],
[
0,
0,
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],
[
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2
],
[
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],
[
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2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"conflicting_netclasses": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"endpoint_off_grid": "warning",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
"missing_unit": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"simulation_model_issue": "ignore",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "PicoPAC.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6
}
],
"meta": {
"version": 3
},
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": [
{
"netclass": "Default",
"pattern": "+5V"
},
{
"netclass": "Default",
"pattern": "/#CS"
},
{
"netclass": "Default",
"pattern": "/#MCU_CE"
},
{
"netclass": "Default",
"pattern": "/#MCU_OE"
},
{
"netclass": "Default",
"pattern": "/#PSEN"
},
{
"netclass": "Default",
"pattern": "/#WR"
},
{
"netclass": "Default",
"pattern": "/5V_CART"
},
{
"netclass": "Default",
"pattern": "/A0"
},
{
"netclass": "Default",
"pattern": "/A1"
},
{
"netclass": "Default",
"pattern": "/A10"
},
{
"netclass": "Default",
"pattern": "/A11"
},
{
"netclass": "Default",
"pattern": "/A12"
},
{
"netclass": "Default",
"pattern": "/A13"
},
{
"netclass": "Default",
"pattern": "/A2"
},
{
"netclass": "Default",
"pattern": "/A3"
},
{
"netclass": "Default",
"pattern": "/A4"
},
{
"netclass": "Default",
"pattern": "/A5"
},
{
"netclass": "Default",
"pattern": "/A6"
},
{
"netclass": "Default",
"pattern": "/A7"
},
{
"netclass": "Default",
"pattern": "/A8"
},
{
"netclass": "Default",
"pattern": "/A9"
},
{
"netclass": "Default",
"pattern": "/CS"
},
{
"netclass": "Default",
"pattern": "/D+"
},
{
"netclass": "Default",
"pattern": "/D-"
},
{
"netclass": "Default",
"pattern": "/D0"
},
{
"netclass": "Default",
"pattern": "/D1"
},
{
"netclass": "Default",
"pattern": "/D2"
},
{
"netclass": "Default",
"pattern": "/D3"
},
{
"netclass": "Default",
"pattern": "/D4"
},
{
"netclass": "Default",
"pattern": "/D5"
},
{
"netclass": "Default",
"pattern": "/D6"
},
{
"netclass": "Default",
"pattern": "/D7"
},
{
"netclass": "Default",
"pattern": "/LED"
},
{
"netclass": "Default",
"pattern": "/MCU_A0"
},
{
"netclass": "Default",
"pattern": "/MCU_A1"
},
{
"netclass": "Default",
"pattern": "/MCU_A10"
},
{
"netclass": "Default",
"pattern": "/MCU_A11"
},
{
"netclass": "Default",
"pattern": "/MCU_A12"
},
{
"netclass": "Default",
"pattern": "/MCU_A13_MOSI"
},
{
"netclass": "Default",
"pattern": "/MCU_A2"
},
{
"netclass": "Default",
"pattern": "/MCU_A3"
},
{
"netclass": "Default",
"pattern": "/MCU_A4"
},
{
"netclass": "Default",
"pattern": "/MCU_A5"
},
{
"netclass": "Default",
"pattern": "/MCU_A6"
},
{
"netclass": "Default",
"pattern": "/MCU_A7"
},
{
"netclass": "Default",
"pattern": "/MCU_A8"
},
{
"netclass": "Default",
"pattern": "/MCU_A9"
},
{
"netclass": "Default",
"pattern": "/MCU_D0"
},
{
"netclass": "Default",
"pattern": "/MCU_D1"
},
{
"netclass": "Default",
"pattern": "/MCU_D2"
},
{
"netclass": "Default",
"pattern": "/MCU_D3"
},
{
"netclass": "Default",
"pattern": "/MCU_D4"
},
{
"netclass": "Default",
"pattern": "/MCU_D5"
},
{
"netclass": "Default",
"pattern": "/MCU_D6"
},
{
"netclass": "Default",
"pattern": "/MCU_D7"
},
{
"netclass": "Default",
"pattern": "/MCU_MISO"
},
{
"netclass": "Default",
"pattern": "/MCU_R/#W"
},
{
"netclass": "Default",
"pattern": "/MCU_RESET"
},
{
"netclass": "Default",
"pattern": "/MCU_SCK"
},
{
"netclass": "Default",
"pattern": "/T0"
},
{
"netclass": "Default",
"pattern": "/TARGET_RESET"
},
{
"netclass": "Default",
"pattern": "/VBUS"
},
{
"netclass": "Default",
"pattern": "/VUSB+"
},
{
"netclass": "Default",
"pattern": "/VUSB-"
},
{
"netclass": "Default",
"pattern": "/VUSB-2"
},
{
"netclass": "Default",
"pattern": "/XTAL1"
},
{
"netclass": "Default",
"pattern": "/XTAL2"
},
{
"netclass": "Default",
"pattern": "GND"
},
{
"netclass": "Default",
"pattern": "Net-(D1-Pad2)"
},
{
"netclass": "Default",
"pattern": "Net-(J2-Pad5)"
}
]
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "videopac-usbcart-kicad5.net",
"plot": "",
"pos_files": "",
"specctra_dsn": "PicoPAC.dsn",
"step": "",
"svg": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"bom_export_filename": "",
"bom_fmt_presets": [],
"bom_fmt_settings": {
"field_delimiter": ",",
"keep_line_breaks": false,
"keep_tabs": false,
"name": "CSV",
"ref_delimiter": ",",
"ref_range_delimiter": "",
"string_delimiter": "\""
},
"bom_presets": [],
"bom_settings": {
"exclude_dnp": false,
"fields_ordered": [
{
"group_by": false,
"label": "Reference",
"name": "Reference",
"show": true
},
{
"group_by": true,
"label": "Value",
"name": "Value",
"show": true
},
{
"group_by": false,
"label": "Datasheet",
"name": "Datasheet",
"show": true
},
{
"group_by": false,
"label": "Footprint",
"name": "Footprint",
"show": true
},
{
"group_by": false,
"label": "Qty",
"name": "${QUANTITY}",
"show": true
},
{
"group_by": true,
"label": "DNP",
"name": "${DNP}",
"show": true
}
],
"filter_string": "",
"group_symbols": true,
"name": "Grouped By Value",
"sort_asc": true,
"sort_field": "Riferimento"
},
"connection_grid_size": 50.0,
"drawing": {
"dashed_lines_dash_length_ratio": 12.0,
"dashed_lines_gap_length_ratio": 3.0,
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.25,
"operating_point_overlay_i_precision": 3,
"operating_point_overlay_i_range": "~A",
"operating_point_overlay_v_precision": 3,
"operating_point_overlay_v_range": "~V",
"overbar_offset_ratio": 1.23,
"pin_symbol_size": 0.0,
"text_offset_ratio": 0.08
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"page_layout_descr_file": "",
"plot_directory": "",
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"",
"spice_model_current_sheet_as_root": true,
"spice_save_all_currents": false,
"spice_save_all_dissipations": false,
"spice_save_all_voltages": false,
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"68240c80-fd35-423c-99b6-fc0e26593664",
"Principale"
]
],
"text_variables": {}
}

4981
Kicad/PicoPAC.kicad_sch Normal file

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63
Kicad/PicoPAC.pro Normal file
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@ -0,0 +1,63 @@
update=29.04.2019 15:26:13
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=videopac-usbcart-kicad5.net
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
TrackWidth2=0.5
TrackWidth3=1
TrackWidth4=2
ViaDiameter1=0.8
ViaDrill1=0.4
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.0508
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=-0

81
Kicad/PicoPAC.rules Normal file
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(rules PCB PicoPAC
(snap_angle
fortyfive_degree
)
(autoroute_settings
(fanout off)
(autoroute on)
(postroute on)
(vias on)
(via_costs 50)
(plane_via_costs 5)
(start_ripup_costs 100)
(start_pass_no 383)
(layer_rule F.Cu
(active on)
(preferred_direction vertical)
(preferred_direction_trace_costs 1.0)
(against_preferred_direction_trace_costs 2.3)
)
(layer_rule B.Cu
(active on)
(preferred_direction horizontal)
(preferred_direction_trace_costs 1.0)
(against_preferred_direction_trace_costs 1.7)
)
)
(rule
(width 250.0)
(clearance 200.0)
(clearance 125.0 (type smd_to_turn_gap))
(clearance 50.0 (type smd))
(clearance 200.0 (type "kicad_default"))
)
(padstack "Via[0-1]_800:400_um"
(shape
(circle F.Cu 800.0 0.0 0.0)
)
(shape
(circle B.Cu 800.0 0.0 0.0)
)
(attach off)
)
(via
"Via[0-1]_800:400_um" "Via[0-1]_800:400_um" default
)
(via
"Via[0-1]_800:400_um-kicad_default" "Via[0-1]_800:400_um" "kicad_default"
)
(via_rule
default "Via[0-1]_800:400_um"
)
(via_rule
"kicad_default" "Via[0-1]_800:400_um-kicad_default"
)
(class default
(clearance_class default)
(via_rule default)
(rule
(width 250.0)
)
(circuit
(use_layer F.Cu B.Cu)
)
)
(class "kicad_default"
+5V GND "Net-(D1-K)" A10 A0 A5 D3 A2
D7 A11 ~{CS} D2 A1 A7 A6 A4
~{PSEN} A12 D5 D0 A8 A13 D1 A3
~{WR} A9 D6 CS T0 D4 RST "unconnected-(J3-Pin_9-Pad9)"
"unconnected-(J3-Pin_1-Pad1)" "unconnected-(J3-Pin_8-Pad8)" "unconnected-(J3-Pin_13-Pad13)" "unconnected-(J3-Pin_5-Pad5)" "unconnected-(J3-Pin_4-Pad4)"
(clearance_class "kicad_default")
(via_rule "kicad_default")
(rule
(width 250.0)
)
(circuit
(use_layer F.Cu B.Cu)
)
)
)

1314
Kicad/PicoPAC.sch Normal file

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1037
Kicad/PicoPAC.ses Normal file

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93066
Kicad/fp-info-cache Normal file

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6
Kicad/fp-lib-table Normal file
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@ -0,0 +1,6 @@
(fp_lib_table
(version 7)
(lib (name "videopac-usbcart-kicad5")(type "KiCad")(uri "D:/Documents/GitHub/videopac-usbcart-kicad5")(options "")(descr ""))
(lib (name "KiCad")(type "KiCad")(uri "C:/Users/Andrea/Documents/Retrocomputer/Philips Videopac/Videopac_USBCART-master/KiCad")(options "")(descr ""))
(lib (name "videopac-usbcart-kicad5-backups")(type "KiCad")(uri "${KIPRJMOD}/videopac-usbcart-kicad5-backups")(options "")(descr ""))
)

3
Kicad/idt7006pf-pn64.dcm Normal file
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@ -0,0 +1,3 @@
EESchema-DOCLIB Version 2.0
#
#End Doc Library

View File

@ -0,0 +1,281 @@
(kicad_symbol_lib (version 20220914) (generator kicad_symbol_editor)
(symbol "IDT7006PF-PN64" (pin_names (offset 1.016)) (in_bom yes) (on_board yes)
(property "Reference" "U" (at 5.08 3.81 0)
(effects (font (size 1.524 1.524)) (justify left))
)
(property "Value" "IDT7006PF-PN64" (at 26.67 -76.2 0)
(effects (font (size 1.524 1.524)) (justify left))
)
(property "Footprint" "" (at 0 -5.08 0)
(effects (font (size 1.524 1.524)) hide)
)
(property "Datasheet" "" (at 0 -5.08 0)
(effects (font (size 1.524 1.524)) hide)
)
(property "ki_locked" "" (at 0 0 0)
(effects (font (size 1.27 1.27)))
)
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80
Kicad/idt7006pf-pn64.lib Normal file
View File

@ -0,0 +1,80 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# IDT7006PF-PN64
#
DEF IDT7006PF-PN64 U 0 40 Y Y 1 L N
F0 "U" 200 150 60 H V L CNN
F1 "IDT7006PF-PN64" 1050 -3000 60 H V L CNN
F2 "" 0 -200 60 H I C CNN
F3 "" 0 -200 60 H I C CNN
DRAW
S 200 100 1350 -2950 1 1 12 N
X I/O2L 1 0 -200 200 R 50 50 1 1 B
X I/O0R 10 1550 0 200 L 50 50 1 1 B
X I/O1R 11 1550 -100 200 L 50 50 1 1 B
X I/O2R 12 1550 -200 200 L 50 50 1 1 B
X VCC 13 750 300 200 D 50 50 1 1 W
X I/O3R 14 1550 -300 200 L 50 50 1 1 B
X I/O4R 15 1550 -400 200 L 50 50 1 1 B
X I/O5R 16 1550 -500 200 L 50 50 1 1 B
X I/O6R 17 1550 -600 200 L 50 50 1 1 B
X I/O7R 18 1550 -700 200 L 50 50 1 1 B
X #OE_R 19 1550 -2250 200 L 50 50 1 1 I
X I/O3L 2 0 -300 200 R 50 50 1 1 B
X R/#W_R 20 1550 -2350 200 L 50 50 1 1 I
X #SEM_R 21 1550 -2450 200 L 50 50 1 1 I
X #CE_R 22 1550 -2550 200 L 50 50 1 1 I
X A13R 23 1550 -2100 200 L 50 50 1 1 I
X GND 24 850 -3150 200 U 50 50 1 1 W
X A12R 25 1550 -2000 200 L 50 50 1 1 I
X A11R 26 1550 -1900 200 L 50 50 1 1 I
X A10R 27 1550 -1800 200 L 50 50 1 1 I
X A9R 28 1550 -1700 200 L 50 50 1 1 I
X A8R 29 1550 -1600 200 L 50 50 1 1 I
X I/O4L 3 0 -400 200 R 50 50 1 1 B
X A7R 30 1550 -1500 200 L 50 50 1 1 I
X A6R 31 1550 -1400 200 L 50 50 1 1 I
X A5R 32 1550 -1300 200 L 50 50 1 1 I
X A4R 33 1550 -1200 200 L 50 50 1 1 I
X A3R 34 1550 -1100 200 L 50 50 1 1 I
X A2R 35 1550 -1000 200 L 50 50 1 1 I
X A1R 36 1550 -900 200 L 50 50 1 1 I
X A0R 37 1550 -800 200 L 50 50 1 1 I
X #INTR 38 1550 -2650 200 L 50 50 1 1 O
X #BUSYR 39 1550 -2750 200 L 50 50 1 1 O
X I/O5L 4 0 -500 200 R 50 50 1 1 B
X M/#S 40 0 -2850 200 R 50 50 1 1 I
X GND 41 950 -3150 200 U 50 50 1 1 W
X #BUSYL 42 0 -2650 200 R 50 50 1 1 O
X #INTL 43 0 -2750 200 R 50 50 1 1 O
X A0L 44 0 -800 200 R 50 50 1 1 I
X A1L 45 0 -900 200 R 50 50 1 1 I
X A2L 46 0 -1000 200 R 50 50 1 1 I
X A3L 47 0 -1100 200 R 50 50 1 1 I
X A4L 48 0 -1200 200 R 50 50 1 1 I
X A5L 49 0 -1300 200 R 50 50 1 1 I
X GND 5 650 -3150 200 U 50 50 1 1 W
X A6L 50 0 -1400 200 R 50 50 1 1 I
X A7L 51 0 -1500 200 R 50 50 1 1 I
X A8L 52 0 -1600 200 R 50 50 1 1 I
X A9L 53 0 -1700 200 R 50 50 1 1 I
X A10L 54 0 -1800 200 R 50 50 1 1 I
X A11L 55 0 -1900 200 R 50 50 1 1 I
X A12L 56 0 -2000 200 R 50 50 1 1 I
X VCC 57 850 300 200 D 50 50 1 1 W
X A13L 58 0 -2100 200 R 50 50 1 1 I
X #CE_L 59 0 -2250 200 R 50 50 1 1 I
X I/O6L 6 0 -600 200 R 50 50 1 1 B
X #SEM_L 60 0 -2350 200 R 50 50 1 1 I
X R/#W_L 61 0 -2450 200 R 50 50 1 1 I
X #OE_L 62 0 -2550 200 R 50 50 1 1 I
X I/O0L 63 0 0 200 R 50 50 1 1 B
X I/O1L 64 0 -100 200 R 50 50 1 1 B
X I/O7L 7 0 -700 200 R 50 50 1 1 B
X VCC 8 650 300 200 D 50 50 1 1 W
X GND 9 750 -3150 200 U 50 50 1 1 W
ENDDRAW
ENDDEF
#
#End Library

View File

@ -0,0 +1,546 @@
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%TF.CreationDate,2024-07-04T23:27:00+02:00*%
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G01*
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%TO.N,unconnected-(J3-Pin_1-Pad1)*%
X61100000Y-56120000D03*
D11*
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X61100000Y-84060000D03*
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X61100000Y-86600000D03*
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X61100000Y-89140000D03*
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%TO.N,~{WR}*%
X61100000Y-91680000D03*
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%TO.N,~{PSEN}*%
X61100000Y-94220000D03*
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%TO.N,D7*%
X61100000Y-96760000D03*
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X61100000Y-99300000D03*
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%TO.N,D5*%
X61100000Y-101840000D03*
%TO.P,J3,20,Pin_20*%
%TO.N,D4*%
X61100000Y-104380000D03*
%TD*%
D10*
%TO.P,J2,1,Pin_1*%
%TO.N,A0*%
X43300000Y-56125000D03*
D11*
%TO.P,J2,2,Pin_2*%
%TO.N,A1*%
X43300000Y-58665000D03*
%TO.P,J2,3,Pin_3*%
%TO.N,A2*%
X43300000Y-61205000D03*
%TO.P,J2,4,Pin_4*%
%TO.N,A3*%
X43300000Y-63745000D03*
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%TO.N,A4*%
X43300000Y-66285000D03*
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X43300000Y-68825000D03*
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X43300000Y-71365000D03*
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%TO.N,A6*%
X43300000Y-73905000D03*
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%TO.N,A7*%
X43300000Y-76445000D03*
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%TO.N,A8*%
X43300000Y-78985000D03*
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%TO.N,A9*%
X43300000Y-81525000D03*
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%TO.N,A10*%
X43300000Y-84065000D03*
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%TO.N,A11*%
X43300000Y-86605000D03*
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%TO.N,A12*%
X43300000Y-89145000D03*
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X43300000Y-91685000D03*
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%TO.N,A13*%
X43300000Y-94225000D03*
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%TO.N,D0*%
X43300000Y-96765000D03*
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%TO.N,D1*%
X43300000Y-99305000D03*
%TO.P,J2,19,Pin_19*%
%TO.N,D2*%
X43300000Y-101845000D03*
%TO.P,J2,20,Pin_20*%
%TO.N,D3*%
X43300000Y-104385000D03*
%TD*%
D12*
%TO.P,SW1,1,1*%
%TO.N,RST*%
X72275000Y-58525000D03*
X78775000Y-58525000D03*
%TO.P,SW1,2,2*%
%TO.N,GND*%
X72275000Y-63025000D03*
X78775000Y-63025000D03*
%TD*%
D13*
%TO.P,D1,1,K*%
%TO.N,Net-(D1-K)*%
X32015000Y-99375000D03*
D14*
%TO.P,D1,2,A*%
%TO.N,+5V*%
X32015000Y-91755000D03*
%TD*%
D15*
%TO.P,J1,A,#WR*%
%TO.N,~{WR}*%
X26500000Y-134000000D03*
%TO.P,J1,B,GND*%
%TO.N,GND*%
X30429000Y-134000000D03*
%TO.P,J1,C,GND*%
X34357000Y-134000000D03*
%TO.P,J1,D,5V*%
%TO.N,+5V*%
X38286000Y-134000000D03*
%TO.P,J1,E,#CS*%
%TO.N,~{CS}*%
X42214000Y-134000000D03*
%TO.P,J1,F,#PSEN*%
%TO.N,~{PSEN}*%
X46143000Y-134000000D03*
%TO.P,J1,G,A0*%
%TO.N,A0*%
X50071000Y-134000000D03*
%TO.P,J1,H,A1*%
%TO.N,A1*%
X54000000Y-134000000D03*
%TO.P,J1,J,A2*%
%TO.N,A2*%
X57929000Y-134000000D03*
%TO.P,J1,K,A3*%
%TO.N,A3*%
X61857000Y-134000000D03*
%TO.P,J1,L,A4*%
%TO.N,A4*%
X65786000Y-134000000D03*
%TO.P,J1,M,A5*%
%TO.N,A5*%
X69714000Y-134000000D03*
%TO.P,J1,N,A7*%
%TO.N,A7*%
X73643000Y-134000000D03*
%TO.P,J1,P,A6*%
%TO.N,A6*%
X77571000Y-134000000D03*
%TO.P,J1,R,A8*%
%TO.N,A8*%
X81500000Y-134000000D03*
%TD*%
D16*
%TO.N,~{WR}*%
X32385400Y-124231600D03*
%TO.N,A13*%
X68956600Y-119881600D03*
%TO.N,A8*%
X45702700Y-79611500D03*
%TO.N,A12*%
X67449900Y-116427600D03*
%TO.N,~{PSEN}*%
X45415700Y-127003600D03*
%TO.N,~{CS}*%
X43677400Y-127266100D03*
X56442500Y-89811600D03*
%TO.N,A10*%
X63575000Y-111780300D03*
%TO.N,GND*%
X35740200Y-104834500D03*
%TD*%
D17*
%TO.N,RST*%
X72275000Y-58525000D02*
X78775000Y-58525000D01*
%TO.N,~{WR}*%
X26500000Y-134000000D02*
X26500000Y-129673300D01*
X26943700Y-129673300D02*
X32385400Y-124231600D01*
X26500000Y-129673300D02*
X26943700Y-129673300D01*
%TO.N,A3*%
X43300000Y-63745000D02*
X43300000Y-64921700D01*
X42941900Y-64921700D02*
X43300000Y-64921700D01*
X40725600Y-67138000D02*
X42941900Y-64921700D01*
X40725600Y-107668400D02*
X40725600Y-67138000D01*
X61857000Y-128799800D02*
X40725600Y-107668400D01*
X61857000Y-134000000D02*
X61857000Y-128799800D01*
%TO.N,A13*%
X68956600Y-119881600D02*
X43300000Y-94225000D01*
%TO.N,A8*%
X81500000Y-126444200D02*
X81500000Y-134000000D01*
X59133200Y-104077400D02*
X81500000Y-126444200D01*
X59133200Y-93529900D02*
X59133200Y-104077400D01*
X45702700Y-80099400D02*
X59133200Y-93529900D01*
X45702700Y-79611500D02*
X45702700Y-80099400D01*
%TO.N,A12*%
X42115500Y-90329500D02*
X43300000Y-89145000D01*
X42115500Y-92209300D02*
X42115500Y-90329500D01*
X42858200Y-92952000D02*
X42115500Y-92209300D01*
X43707900Y-92952000D02*
X42858200Y-92952000D01*
X67183500Y-116427600D02*
X43707900Y-92952000D01*
X67449900Y-116427600D02*
X67183500Y-116427600D01*
%TO.N,~{PSEN}*%
X46143000Y-134000000D02*
X46143000Y-131000000D01*
X46143000Y-127730900D02*
X45415700Y-127003600D01*
X46143000Y-131000000D02*
X46143000Y-127730900D01*
%TO.N,A4*%
X43300000Y-66285000D02*
X43300000Y-67461700D01*
X42918500Y-67461700D02*
X43300000Y-67461700D01*
X41177300Y-69202900D02*
X42918500Y-67461700D01*
X41177300Y-103926500D02*
X41177300Y-69202900D01*
X65786000Y-128535200D02*
X41177300Y-103926500D01*
X65786000Y-134000000D02*
X65786000Y-128535200D01*
%TO.N,A6*%
X43300000Y-73905000D02*
X43300000Y-75081700D01*
X77571000Y-134000000D02*
X77571000Y-129673300D01*
X77571000Y-123167800D02*
X77571000Y-129673300D01*
X56278900Y-101875700D02*
X77571000Y-123167800D01*
X56278900Y-91321200D02*
X56278900Y-101875700D01*
X44976000Y-80018300D02*
X56278900Y-91321200D01*
X44976000Y-76394100D02*
X44976000Y-80018300D01*
X43663600Y-75081700D02*
X44976000Y-76394100D01*
X43300000Y-75081700D02*
X43663600Y-75081700D01*
%TO.N,A7*%
X43300000Y-76445000D02*
X43300000Y-77621700D01*
X73643000Y-119932900D02*
X73643000Y-134000000D01*
X55375600Y-101665500D02*
X73643000Y-119932900D01*
X55375600Y-92452800D02*
X55375600Y-101665500D01*
X44501000Y-81578200D02*
X55375600Y-92452800D01*
X44501000Y-78521800D02*
X44501000Y-81578200D01*
X43600900Y-77621700D02*
X44501000Y-78521800D01*
X43300000Y-77621700D02*
X43600900Y-77621700D01*
%TO.N,A1*%
X54000000Y-134000000D02*
X54000000Y-131000000D01*
X43300000Y-58665000D02*
X43300000Y-59841700D01*
X42934300Y-59841700D02*
X43300000Y-59841700D01*
X39819200Y-62956800D02*
X42934300Y-59841700D01*
X39819200Y-114855200D02*
X39819200Y-62956800D01*
X54000000Y-129036000D02*
X39819200Y-114855200D01*
X54000000Y-131000000D02*
X54000000Y-129036000D01*
%TO.N,~{CS}*%
X43677400Y-128209900D02*
X43677400Y-127266100D01*
X42214000Y-129673300D02*
X43677400Y-128209900D01*
X60732300Y-82696700D02*
X61100000Y-82696700D01*
X56442500Y-86986500D02*
X60732300Y-82696700D01*
X56442500Y-89811600D02*
X56442500Y-86986500D01*
X61100000Y-81520000D02*
X61100000Y-82696700D01*
X42214000Y-134000000D02*
X42214000Y-129673300D01*
%TO.N,A2*%
X57929000Y-134000000D02*
X57929000Y-129673300D01*
X43300000Y-61205000D02*
X43300000Y-62381700D01*
X42932300Y-62381700D02*
X43300000Y-62381700D01*
X40271700Y-65042300D02*
X42932300Y-62381700D01*
X40271700Y-112016000D02*
X40271700Y-65042300D01*
X57929000Y-129673300D02*
X40271700Y-112016000D01*
%TO.N,A5*%
X43300000Y-71365000D02*
X43300000Y-72541700D01*
X69713900Y-129673300D02*
X69714000Y-129673300D01*
X69713900Y-116891400D02*
X69713900Y-129673300D01*
X54919300Y-102096800D02*
X69713900Y-116891400D01*
X54919300Y-94020100D02*
X54919300Y-102096800D01*
X43787500Y-82888300D02*
X54919300Y-94020100D01*
X42931500Y-82888300D02*
X43787500Y-82888300D01*
X42123300Y-82080100D02*
X42931500Y-82888300D01*
X42123300Y-73350600D02*
X42123300Y-82080100D01*
X42932200Y-72541700D02*
X42123300Y-73350600D01*
X43300000Y-72541700D02*
X42932200Y-72541700D01*
X69714000Y-134000000D02*
X69714000Y-129673300D01*
%TO.N,A0*%
X50071000Y-134000000D02*
X50071000Y-131000000D01*
X42932300Y-57301700D02*
X43300000Y-57301700D01*
X39367500Y-60866500D02*
X42932300Y-57301700D01*
X39367500Y-115145700D02*
X39367500Y-60866500D01*
X50071000Y-125849200D02*
X39367500Y-115145700D01*
X50071000Y-131000000D02*
X50071000Y-125849200D01*
X43300000Y-56125000D02*
X43300000Y-57301700D01*
%TO.N,A10*%
X43300000Y-84065000D02*
X43300000Y-85241700D01*
X45243000Y-93448300D02*
X63575000Y-111780300D01*
X45243000Y-86817000D02*
X45243000Y-93448300D01*
X43667700Y-85241700D02*
X45243000Y-86817000D01*
X43300000Y-85241700D02*
X43667700Y-85241700D01*
%TO.N,GND*%
X43300000Y-91685000D02*
X43300000Y-90508300D01*
X30429000Y-134000000D02*
X30429000Y-129673300D01*
D18*
X34400000Y-131937500D02*
X34400000Y-131250000D01*
D17*
X61100000Y-68820000D02*
X61100000Y-67643300D01*
X62276700Y-66834400D02*
X62276700Y-63025000D01*
X61467800Y-67643300D02*
X62276700Y-66834400D01*
X61100000Y-67643300D02*
X61467800Y-67643300D01*
X61628400Y-62376700D02*
X61100000Y-62376700D01*
X62276700Y-63025000D02*
X61628400Y-62376700D01*
X61100000Y-61200000D02*
X61100000Y-62376700D01*
X43300000Y-68825000D02*
X43300000Y-69413300D01*
X43300000Y-69413300D02*
X43300000Y-70001700D01*
X59330000Y-69413300D02*
X59923300Y-68820000D01*
X43300000Y-69413300D02*
X59330000Y-69413300D01*
X61100000Y-68820000D02*
X59923300Y-68820000D01*
X62276700Y-63025000D02*
X72275000Y-63025000D01*
X72275000Y-63025000D02*
X78775000Y-63025000D01*
X30429000Y-129673300D02*
X32984300Y-129673300D01*
X32984300Y-130521800D02*
X34400000Y-131937500D01*
X32984300Y-129673300D02*
X32984300Y-130521800D01*
X35740200Y-126917400D02*
X35740200Y-104834500D01*
X32984300Y-129673300D02*
X35740200Y-126917400D01*
X42932300Y-70001700D02*
X43300000Y-70001700D01*
X41671300Y-71262700D02*
X42932300Y-70001700D01*
X41671300Y-86645100D02*
X41671300Y-71262700D01*
X42994500Y-87968300D02*
X41671300Y-86645100D01*
X43826500Y-87968300D02*
X42994500Y-87968300D01*
X44476700Y-88618500D02*
X43826500Y-87968300D01*
X44476700Y-89699400D02*
X44476700Y-88618500D01*
X43667800Y-90508300D02*
X44476700Y-89699400D01*
X43300000Y-90508300D02*
X43667800Y-90508300D01*
D18*
X34400000Y-134000000D02*
X34400000Y-132968700D01*
X34400000Y-132968700D02*
X34400000Y-131937500D01*
D17*
X34357000Y-133011700D02*
X34357000Y-134000000D01*
X34400000Y-132968700D02*
X34357000Y-133011700D01*
%TO.N,+5V*%
X32015000Y-91755000D02*
X32015000Y-92881700D01*
X38320000Y-99186700D02*
X38320000Y-131250000D01*
X32015000Y-92881700D02*
X38320000Y-99186700D01*
D18*
X38320000Y-134000000D02*
X38320000Y-132625000D01*
X38320000Y-132625000D02*
X38320000Y-131250000D01*
D17*
X38286000Y-132659000D02*
X38286000Y-134000000D01*
X38320000Y-132625000D02*
X38286000Y-132659000D01*
%TD*%
M02*

View File

@ -0,0 +1,566 @@
%TF.GenerationSoftware,KiCad,Pcbnew,8.0.3*%
%TF.CreationDate,2024-07-04T23:27:00+02:00*%
%TF.ProjectId,PicoPAC,5069636f-5041-4432-9e6b-696361645f70,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Copper,L1,Top*%
%TF.FilePolarity,Positive*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 8.0.3) date 2024-07-04 23:27:00*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
%TA.AperFunction,ComponentPad*%
%ADD10R,1.700000X1.700000*%
%TD*%
%TA.AperFunction,ComponentPad*%
%ADD11O,1.700000X1.700000*%
%TD*%
%TA.AperFunction,ComponentPad*%
%ADD12C,2.000000*%
%TD*%
%TA.AperFunction,ComponentPad*%
%ADD13R,1.600000X1.600000*%
%TD*%
%TA.AperFunction,ComponentPad*%
%ADD14O,1.600000X1.600000*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD15R,2.000000X8.000000*%
%TD*%
%TA.AperFunction,ViaPad*%
%ADD16C,0.800000*%
%TD*%
%TA.AperFunction,Conductor*%
%ADD17C,0.250000*%
%TD*%
G04 APERTURE END LIST*
D10*
%TO.P,J3,1,Pin_1*%
%TO.N,unconnected-(J3-Pin_1-Pad1)*%
X61100000Y-56120000D03*
D11*
%TO.P,J3,2,Pin_2*%
%TO.N,Net-(D1-K)*%
X61100000Y-58660000D03*
%TO.P,J3,3,Pin_3*%
%TO.N,GND*%
X61100000Y-61200000D03*
%TO.P,J3,4,Pin_4*%
%TO.N,unconnected-(J3-Pin_4-Pad4)*%
X61100000Y-63740000D03*
%TO.P,J3,5,Pin_5*%
%TO.N,unconnected-(J3-Pin_5-Pad5)*%
X61100000Y-66280000D03*
%TO.P,J3,6,Pin_6*%
%TO.N,GND*%
X61100000Y-68820000D03*
%TO.P,J3,7,Pin_7*%
%TO.N,RST*%
X61100000Y-71360000D03*
%TO.P,J3,8,Pin_8*%
%TO.N,unconnected-(J3-Pin_8-Pad8)*%
X61100000Y-73900000D03*
%TO.P,J3,9,Pin_9*%
%TO.N,unconnected-(J3-Pin_9-Pad9)*%
X61100000Y-76440000D03*
%TO.P,J3,10,Pin_10*%
%TO.N,T0*%
X61100000Y-78980000D03*
%TO.P,J3,11,Pin_11*%
%TO.N,~{CS}*%
X61100000Y-81520000D03*
%TO.P,J3,12,Pin_12*%
%TO.N,GND*%
X61100000Y-84060000D03*
%TO.P,J3,13,Pin_13*%
%TO.N,unconnected-(J3-Pin_13-Pad13)*%
X61100000Y-86600000D03*
%TO.P,J3,14,Pin_14*%
%TO.N,CS*%
X61100000Y-89140000D03*
%TO.P,J3,15,Pin_15*%
%TO.N,~{WR}*%
X61100000Y-91680000D03*
%TO.P,J3,16,Pin_16*%
%TO.N,~{PSEN}*%
X61100000Y-94220000D03*
%TO.P,J3,17,Pin_17*%
%TO.N,D7*%
X61100000Y-96760000D03*
%TO.P,J3,18,Pin_18*%
%TO.N,D6*%
X61100000Y-99300000D03*
%TO.P,J3,19,Pin_19*%
%TO.N,D5*%
X61100000Y-101840000D03*
%TO.P,J3,20,Pin_20*%
%TO.N,D4*%
X61100000Y-104380000D03*
%TD*%
D10*
%TO.P,J2,1,Pin_1*%
%TO.N,A0*%
X43300000Y-56125000D03*
D11*
%TO.P,J2,2,Pin_2*%
%TO.N,A1*%
X43300000Y-58665000D03*
%TO.P,J2,3,Pin_3*%
%TO.N,A2*%
X43300000Y-61205000D03*
%TO.P,J2,4,Pin_4*%
%TO.N,A3*%
X43300000Y-63745000D03*
%TO.P,J2,5,Pin_5*%
%TO.N,A4*%
X43300000Y-66285000D03*
%TO.P,J2,6,Pin_6*%
%TO.N,GND*%
X43300000Y-68825000D03*
%TO.P,J2,7,Pin_7*%
%TO.N,A5*%
X43300000Y-71365000D03*
%TO.P,J2,8,Pin_8*%
%TO.N,A6*%
X43300000Y-73905000D03*
%TO.P,J2,9,Pin_9*%
%TO.N,A7*%
X43300000Y-76445000D03*
%TO.P,J2,10,Pin_10*%
%TO.N,A8*%
X43300000Y-78985000D03*
%TO.P,J2,11,Pin_11*%
%TO.N,A9*%
X43300000Y-81525000D03*
%TO.P,J2,12,Pin_12*%
%TO.N,A10*%
X43300000Y-84065000D03*
%TO.P,J2,13,Pin_13*%
%TO.N,A11*%
X43300000Y-86605000D03*
%TO.P,J2,14,Pin_14*%
%TO.N,A12*%
X43300000Y-89145000D03*
%TO.P,J2,15,Pin_15*%
%TO.N,GND*%
X43300000Y-91685000D03*
%TO.P,J2,16,Pin_16*%
%TO.N,A13*%
X43300000Y-94225000D03*
%TO.P,J2,17,Pin_17*%
%TO.N,D0*%
X43300000Y-96765000D03*
%TO.P,J2,18,Pin_18*%
%TO.N,D1*%
X43300000Y-99305000D03*
%TO.P,J2,19,Pin_19*%
%TO.N,D2*%
X43300000Y-101845000D03*
%TO.P,J2,20,Pin_20*%
%TO.N,D3*%
X43300000Y-104385000D03*
%TD*%
D12*
%TO.P,SW1,1,1*%
%TO.N,RST*%
X72275000Y-58525000D03*
X78775000Y-58525000D03*
%TO.P,SW1,2,2*%
%TO.N,GND*%
X72275000Y-63025000D03*
X78775000Y-63025000D03*
%TD*%
D13*
%TO.P,D1,1,K*%
%TO.N,Net-(D1-K)*%
X32015000Y-99375000D03*
D14*
%TO.P,D1,2,A*%
%TO.N,+5V*%
X32015000Y-91755000D03*
%TD*%
D15*
%TO.P,J1,1,T0*%
%TO.N,T0*%
X26500000Y-134000000D03*
%TO.P,J1,2,B0*%
%TO.N,D0*%
X30429000Y-134000000D03*
%TO.P,J1,3,B1*%
%TO.N,D1*%
X34357000Y-134000000D03*
%TO.P,J1,4,B2*%
%TO.N,D2*%
X38286000Y-134000000D03*
%TO.P,J1,5,B3*%
%TO.N,D3*%
X42214000Y-134000000D03*
%TO.P,J1,6,B4*%
%TO.N,D4*%
X46143000Y-134000000D03*
%TO.P,J1,7,B5*%
%TO.N,D5*%
X50071000Y-134000000D03*
%TO.P,J1,8,B6*%
%TO.N,D6*%
X54000000Y-134000000D03*
%TO.P,J1,9,B7*%
%TO.N,D7*%
X57929000Y-134000000D03*
%TO.P,J1,10,A10*%
%TO.N,A10*%
X61857000Y-134000000D03*
%TO.P,J1,11,CS*%
%TO.N,CS*%
X65786000Y-134000000D03*
%TO.P,J1,12,P11*%
%TO.N,A12*%
X69714000Y-134000000D03*
%TO.P,J1,13,P10*%
%TO.N,A13*%
X73643000Y-134000000D03*
%TO.P,J1,14,A11*%
%TO.N,A11*%
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G04 Aperture macros list end*
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%ADD17C,9.000000*%
G04 APERTURE END LIST*
D10*
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File diff suppressed because it is too large Load Diff

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%TF.GenerationSoftware,KiCad,Pcbnew,8.0.3*%
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%TF.ProjectId,PicoPAC,5069636f-5041-4432-9e6b-696361645f70,rev?*%
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View File

@ -0,0 +1,6 @@
Comment,Designator,Footprint,LCSC
Conn_01x20,J3,PinSocket_1x20_P2.54mm_Vertical,
Conn_01x20,J2,PinSocket_1x20_P2.54mm_Vertical,
SW_Push,SW1,SW_PUSH_6mm,
Diode ,D1,D_DO-35_SOD27_P7.62mm_Horizontal,
Videopac-edgeconnector,J1,videopac-edgecon,
1 Comment Designator Footprint LCSC
2 Conn_01x20 J3 PinSocket_1x20_P2.54mm_Vertical
3 Conn_01x20 J2 PinSocket_1x20_P2.54mm_Vertical
4 SW_Push SW1 SW_PUSH_6mm
5 Diode D1 D_DO-35_SOD27_P7.62mm_Horizontal
6 Videopac-edgeconnector J1 videopac-edgecon

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@ -0,0 +1,6 @@
Designator,Val,Package,Mid X,Mid Y,Rotation,Layer
D1,Diode ,D_DO-35_SOD27_P7.62mm_Horizontal,32.015,-95.565,90.0,top
J1,Videopac-edgeconnector,videopac-edgecon,54.0,-124.25,0.0,top
J2,Conn_01x20,PinSocket_1x20_P2.54mm_Vertical,43.3,-80.255,0.0,top
J3,Conn_01x20,PinSocket_1x20_P2.54mm_Vertical,61.1,-80.25,0.0,top
SW1,SW_Push,SW_PUSH_6mm,75.525,-60.775,0.0,top
1 Designator Val Package Mid X Mid Y Rotation Layer
2 D1 Diode D_DO-35_SOD27_P7.62mm_Horizontal 32.015 -95.565 90.0 top
3 J1 Videopac-edgeconnector videopac-edgecon 54.0 -124.25 0.0 top
4 J2 Conn_01x20 PinSocket_1x20_P2.54mm_Vertical 43.3 -80.255 0.0 top
5 J3 Conn_01x20 PinSocket_1x20_P2.54mm_Vertical 61.1 -80.25 0.0 top
6 SW1 SW_Push SW_PUSH_6mm 75.525 -60.775 0.0 top

Binary file not shown.

BIN
Kicad/jlcpcb/project.db Normal file

Binary file not shown.

6
Kicad/sym-lib-table Normal file
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@ -0,0 +1,6 @@
(sym_lib_table
(version 7)
(lib (name "videopac")(type "KiCad")(uri "${KIPRJMOD}/videopac.kicad_sym")(options "")(descr ""))
(lib (name "videopac-edgeconnector")(type "KiCad")(uri "${KIPRJMOD}/videopac-edgeconnector.kicad_sym")(options "")(descr ""))
(lib (name "idt7006pf-pn64")(type "KiCad")(uri "${KIPRJMOD}/idt7006pf-pn64.kicad_sym")(options "")(descr ""))
)

View File

@ -0,0 +1,76 @@
(footprint "videopac-edgecon" (version 20221018) (generator pcbnew)
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View File

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EESchema-DOCLIB Version 2.0
#
#End Doc Library

View File

@ -0,0 +1,144 @@
(kicad_symbol_lib (version 20220914) (generator kicad_symbol_editor)
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(effects (font (size 1.27 1.27)))
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(property "Value" "Videopac-edgeconnector" (at 0 -21.59 90)
(effects (font (size 1.27 1.27)))
)
(property "Footprint" "" (at 0 26.67 0)
(effects (font (size 1.27 1.27)) hide)
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(property "Datasheet" "" (at 0 26.67 0)
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(pin input line (at 12.7 -24.13 180) (length 2.54)
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(pin power_in line (at 12.7 -29.21 180) (length 2.54)
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(pin power_in line (at 12.7 -31.75 180) (length 2.54)
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(number "R" (effects (font (size 1.27 1.27))))
)
)
)
)

View File

@ -0,0 +1,46 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Videopac-edgeconnector
#
DEF Videopac-edgeconnector J 0 40 Y Y 1 F N
F0 "J" 150 1800 50 H V C CNN
F1 "Videopac-edgeconnector" 0 -850 50 V V C CNN
F2 "" 0 1050 50 H I C CNN
F3 "" 0 1050 50 H I C CNN
DRAW
S 50 1750 400 -1300 0 1 0 N
X T0 1 500 -950 100 L 50 50 1 1 I
X A10 10 500 -150 100 L 50 50 1 1 I
X CS 11 500 -750 100 L 50 50 1 1 I
X P11 12 500 -350 100 L 50 50 1 1 I
X P10 13 500 -450 100 L 50 50 1 1 I
X A11 14 500 -250 100 L 50 50 1 1 I
X A9 15 500 -50 100 L 50 50 1 1 I
X B0 2 500 1650 100 L 50 50 1 1 I
X B1 3 500 1550 100 L 50 50 1 1 I
X B2 4 500 1450 100 L 50 50 1 1 I
X B3 5 500 1350 100 L 50 50 1 1 I
X B4 6 500 1250 100 L 50 50 1 1 I
X B5 7 500 1150 100 L 50 50 1 1 I
X B6 8 500 1050 100 L 50 50 1 1 I
X B7 9 500 950 100 L 50 50 1 1 I
X #WR A 500 -650 100 L 50 50 1 1 I
X GND B 500 -1150 100 L 50 50 1 1 W
X GND C 500 -1250 100 L 50 50 1 1 W
X 5V D 500 -1050 100 L 50 50 1 1 W
X #CS E 500 -850 100 L 50 50 1 1 I
X #PSEN F 500 -550 100 L 50 50 1 1 I
X A0 G 500 850 100 L 50 50 1 1 I
X A1 H 500 750 100 L 50 50 1 1 I
X A2 J 500 650 100 L 50 50 1 1 I
X A3 K 500 550 100 L 50 50 1 1 I
X A4 L 500 450 100 L 50 50 1 1 I
X A5 M 500 350 100 L 50 50 1 1 I
X A7 N 500 150 100 L 50 50 1 1 I
X A6 P 500 250 100 L 50 50 1 1 I
X A8 R 500 50 100 L 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library

3
Kicad/videopac.dcm Normal file
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@ -0,0 +1,3 @@
EESchema-DOCLIB Version 2.0
#
#End Doc Library

144
Kicad/videopac.kicad_sym Normal file
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@ -0,0 +1,144 @@
(kicad_symbol_lib (version 20220914) (generator kicad_symbol_editor)
(symbol "Videopac-edgeconnector" (pin_names (offset 1.016)) (in_bom yes) (on_board yes)
(property "Reference" "J" (at 3.81 45.72 0)
(effects (font (size 1.27 1.27)))
)
(property "Value" "Videopac-edgeconnector" (at 0 -21.59 90)
(effects (font (size 1.27 1.27)))
)
(property "Footprint" "" (at 0 26.67 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "Datasheet" "" (at 0 26.67 0)
(effects (font (size 1.27 1.27)) hide)
)
(symbol "Videopac-edgeconnector_0_1"
(rectangle (start 1.27 44.45) (end 10.16 -33.02)
(stroke (width 0) (type solid))
(fill (type none))
)
)
(symbol "Videopac-edgeconnector_1_1"
(pin input line (at 12.7 -24.13 180) (length 2.54)
(name "T0" (effects (font (size 1.27 1.27))))
(number "1" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 -3.81 180) (length 2.54)
(name "A10" (effects (font (size 1.27 1.27))))
(number "10" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 -19.05 180) (length 2.54)
(name "CS" (effects (font (size 1.27 1.27))))
(number "11" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 -8.89 180) (length 2.54)
(name "P11" (effects (font (size 1.27 1.27))))
(number "12" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 -11.43 180) (length 2.54)
(name "P10" (effects (font (size 1.27 1.27))))
(number "13" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 -6.35 180) (length 2.54)
(name "A11" (effects (font (size 1.27 1.27))))
(number "14" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 -1.27 180) (length 2.54)
(name "A9" (effects (font (size 1.27 1.27))))
(number "15" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 41.91 180) (length 2.54)
(name "B0" (effects (font (size 1.27 1.27))))
(number "2" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 39.37 180) (length 2.54)
(name "B1" (effects (font (size 1.27 1.27))))
(number "3" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 36.83 180) (length 2.54)
(name "B2" (effects (font (size 1.27 1.27))))
(number "4" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 34.29 180) (length 2.54)
(name "B3" (effects (font (size 1.27 1.27))))
(number "5" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 31.75 180) (length 2.54)
(name "B4" (effects (font (size 1.27 1.27))))
(number "6" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 29.21 180) (length 2.54)
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)
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(number "8" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 24.13 180) (length 2.54)
(name "B7" (effects (font (size 1.27 1.27))))
(number "9" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 -16.51 180) (length 2.54)
(name "#WR" (effects (font (size 1.27 1.27))))
(number "A" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at 12.7 -29.21 180) (length 2.54)
(name "GND" (effects (font (size 1.27 1.27))))
(number "B" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at 12.7 -31.75 180) (length 2.54)
(name "GND" (effects (font (size 1.27 1.27))))
(number "C" (effects (font (size 1.27 1.27))))
)
(pin power_in line (at 12.7 -26.67 180) (length 2.54)
(name "5V" (effects (font (size 1.27 1.27))))
(number "D" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 -21.59 180) (length 2.54)
(name "#CS" (effects (font (size 1.27 1.27))))
(number "E" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 -13.97 180) (length 2.54)
(name "#PSEN" (effects (font (size 1.27 1.27))))
(number "F" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 21.59 180) (length 2.54)
(name "A0" (effects (font (size 1.27 1.27))))
(number "G" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 19.05 180) (length 2.54)
(name "A1" (effects (font (size 1.27 1.27))))
(number "H" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 16.51 180) (length 2.54)
(name "A2" (effects (font (size 1.27 1.27))))
(number "J" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 13.97 180) (length 2.54)
(name "A3" (effects (font (size 1.27 1.27))))
(number "K" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 11.43 180) (length 2.54)
(name "A4" (effects (font (size 1.27 1.27))))
(number "L" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 8.89 180) (length 2.54)
(name "A5" (effects (font (size 1.27 1.27))))
(number "M" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 3.81 180) (length 2.54)
(name "A7" (effects (font (size 1.27 1.27))))
(number "N" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 6.35 180) (length 2.54)
(name "A6" (effects (font (size 1.27 1.27))))
(number "P" (effects (font (size 1.27 1.27))))
)
(pin input line (at 12.7 1.27 180) (length 2.54)
(name "A8" (effects (font (size 1.27 1.27))))
(number "R" (effects (font (size 1.27 1.27))))
)
)
)
)

46
Kicad/videopac.lib Normal file
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@ -0,0 +1,46 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Videopac-edgeconnector
#
DEF Videopac-edgeconnector J 0 40 Y Y 1 F N
F0 "J" 150 1800 50 H V C CNN
F1 "Videopac-edgeconnector" 0 -850 50 V V C CNN
F2 "" 0 1050 50 H I C CNN
F3 "" 0 1050 50 H I C CNN
DRAW
S 50 1750 400 -1300 0 1 0 N
X T0 1 500 -950 100 L 50 50 1 1 I
X A10 10 500 -150 100 L 50 50 1 1 I
X CS 11 500 -750 100 L 50 50 1 1 I
X P11 12 500 -350 100 L 50 50 1 1 I
X P10 13 500 -450 100 L 50 50 1 1 I
X A11 14 500 -250 100 L 50 50 1 1 I
X A9 15 500 -50 100 L 50 50 1 1 I
X B0 2 500 1650 100 L 50 50 1 1 I
X B1 3 500 1550 100 L 50 50 1 1 I
X B2 4 500 1450 100 L 50 50 1 1 I
X B3 5 500 1350 100 L 50 50 1 1 I
X B4 6 500 1250 100 L 50 50 1 1 I
X B5 7 500 1150 100 L 50 50 1 1 I
X B6 8 500 1050 100 L 50 50 1 1 I
X B7 9 500 950 100 L 50 50 1 1 I
X #WR A 500 -650 100 L 50 50 1 1 I
X GND B 500 -1150 100 L 50 50 1 1 W
X GND C 500 -1250 100 L 50 50 1 1 W
X 5V D 500 -1050 100 L 50 50 1 1 W
X #CS E 500 -850 100 L 50 50 1 1 I
X #PSEN F 500 -550 100 L 50 50 1 1 I
X A0 G 500 850 100 L 50 50 1 1 I
X A1 H 500 750 100 L 50 50 1 1 I
X A2 J 500 650 100 L 50 50 1 1 I
X A3 K 500 550 100 L 50 50 1 1 I
X A4 L 500 450 100 L 50 50 1 1 I
X A5 M 500 350 100 L 50 50 1 1 I
X A7 N 500 150 100 L 50 50 1 1 I
X A6 P 500 250 100 L 50 50 1 1 I
X A8 R 500 50 100 L 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library